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PillarHall test chip able to analyse 3D thin film structures

The PillarHall test chip for analysing 3D thin film structures from Chipmetrics Oy, a spin-off of VTT, is now entering commercial production..

The test chip has been developed to enable the production of smaller nanostructures and components and opening up new opportunities for the development of semiconductors, memory circuits and smart devices, among others.

3D manufacturing and integration are megatrends in the semiconductor industry, as they can be used to improve the performance and energy efficiency of transistors and memory circuits. New micro-scale structures and materials as well as shrinking geometry are challenges for semiconductor manufacturers because they require process equipment, measurement and testing developed for 3D. PillarHall is the solution to these challenges.

With artificial intelligence being integrated everywhere, and intelligent transport, data centres and medical technology having an increasing impact, components are now required to be more reliable than ever before, and more measurement and testing is needed to this end.

The PillarHall test chip is intended for the reliable, fast and cost-effective comparison of manufacturing processes of thin film structures. It can be used to measure the conformality of the thin film process, i.e. the ability to coat a 3D object evenly.

"The PillarHall disposable test chip can be used to compare different 3D thin film processes and reactors. The method is exceptional, as typically measurements have been made directly from the processed wafers using demanding and expensive measuring devices. The test chip can be used to accelerate process development and also monitor production in the future,” said Chipmetrics founder, ,Dr. Mikko Utriainen.

"VTT has patented the unique structure of the test chip and developed manufacturing methods for the production of test chips. This provides a good technological basis for the growth of Chipmetrics in the global market,” said Tauno Vähä-Heikkilä, Vice President of Microelectronics, VTT.

The test chip is the result of expertise in atomic layer deposition (ALD) in Finland and VTT’s experience in MEMS manufacturing processes.

The test chip has been developed by VTT through various research projects since 2013. The development has taken place at Micronova, a unique, collaborative research, development and production environment that combines research and industry. In addition to VTT and Aalto University, some 20 companies operate in Micronova.

The initial market focus of the test chip is in ALD. In addition to ALD equipment and process developers, component manufacturers have shown great interest in the test chip. The solution can also be used to develop any other thin film process technology to meet 3D requirements.

VTT has already piloted the test chip on the international market.

Neil Tyler

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