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Harvard chooses embedded FPGA for deep learning chip

Prof Gu-Yeon Wei. pic: Stephanie Mitchell/Harvard

A deep learning chip being developed by a research group at Harvard’s School of Engineering and Applied Sciences will feature Flex Logix’s embedded FPGA technology. According to the team – led by Professors David Brooks and Gu-Yeon Wei – the chip design and tape-out have been completed and the project is going into fabrication on TSMC’s 16FFC process.

“We see a huge opportunity for reconfigurable logic in SoCs targeting deep learning for a wide range of applications, such as data centres, mobile and IoT,” said Prof Wei, pictured. “Embedded FPGA is changing the way chips are designed and we recognised the power of being able to reconfigure RTL when designing our deep learning chip.”

Geoff Tate, Flex Logix’ CEO, added: “Deep learning has the potential to grow significantly and we are excited to demonstrate the value of our platform for deep learning in a variety of uses. Profs Brooks and Wei are respected leaders in this field … and we are honoured to be chosen as their embedded FPGA partner.”

Graham Pitcher

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