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III-V research boost

Research program may bring III-V materials into the mainstream.

The US National Science Foundation (NSF) has backed a three year research project into a technique that could bring III-V compound semiconductors into the mainstream by smoothing their integration with more traditional materials.
Aspect ratio trapping (ART) was developed at New Hampshire based AmberWave Systems, recently best known for a patent spat with Intel over strained silicon technology.
ART seeks to eliminate lattice mismatch defects that hamper the integration of III-V materials by confining sidewalls in the design laterally, allowing the more effective growth of germanium, gallium arsenide and other IIV-V materials in submicron trenches on silicon substrates.
In research published earlier this year, AmberWave demonstrated the technique in combination with traditional lithography and reactive ion etching of silicon dioxide. In one case, the selective and defect free growth of germanium in 450nm layers was achieved.
The effective integration of III-V materials would enable optical on chip communication at much faster speeds and at low cost. Compound semiconductors have been confined to niche, high performance applications because of production difficulties.
The NSF grant sees AmberWave collaborate with the Rochester Institute of Technology (RIT) which specialises in nanoelectronics.
Donald Boyd, RIT’s vice president for research, said: “This research holds the potential for seamlessly integrating III-V and silicon microelectronics to retain the best properties of each, opening up the possibility for truly massive speed improvements in memory and processor chips.”

Author
Paul Dempsey

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