The ever-increasing demand for longer battery life and faster performance of computers and mobile devices has driven rapid innovation and change in semiconductor devices. According to Moore's Law, device performance has been doubling every 1.5 to 2 years and this has been the case for more than 30 years.
This incredibly fast innovation cycle is putting huge pressure on R&D departments, in particular when it comes to material – a key component of device innovation. To be able to keep up with the current pace, the industry is likely to move away from its past focus on device shrinkage and instead will be more focused on materials engineering and structural design changes. However, let us start with examining developments to date. Until about 10 years ago, all the benefits of performance came from simple geometrical shrinks of the devices. Historically, semiconductor devices have been made primarily from silicon or silicon dioxide, a few dopants and some conducting metals like W, Ti, TiN and Cu. Simply stated, the transistors became continually smaller, so you could have more transistors in the same size chip, resulting in higher performance for logic devices. Simultaneously, chips ran faster as a result of the smaller geometry. Unfortunately, this approach was not sustainable and at around the 90nm node, that trend changed and materials engineering was used to extract further performance improvements. The first innovation was adding a compressive or tensile stress on the channel for the two different types of transistors in CMOS logic. This had the effect of increasing the transistor drive current and decreasing the switching time. In fact, this innovation provided twice the benefit of a single shrink. This was done by incorporating germanium in the source and drain regions to form an epitaxial SiGe layer for PMOS transistors and by adding a tensile silicon nitride layer on top of the NMOS transistors. This approach, first used by a leading semiconductor manufacturer in 2003 for its 90nm devices, is now standard in all logic devices. The next limit was reached in the gate oxide. With each shrink, the gate oxide (SiO2) got thinner and thinner, to the point where, at the 45nm node for logic devices, it was only a few atomic layers thick. This resulted in high leakage currents which drain battery life. To tackle this problem SiO2 was replaced with HfO2, a material with higher dielectric constant. This allowed for a thicker gate oxide film and reduced leakage current. This also introduced a brand new element, Hf, into the device and a new precursor, HfCl4, to deliver it. Until then, all deposition precursors were gaseous at normal conditions; HfCl4, on the other hand, is solid. Moreover, the thickness of these films is very small – less than 5nm – so a new technique called Atomic Layer Deposition (ALD) was used to create them. Future generations will use new gate oxide materials and some elements under consideration include Zr and Al, as well as the lanthanides and their mixtures with Hf oxides. When SiO2 was replaced by HfO2, the gate electrode material also had to be changed from polysilicon to metals such as TiN, TiAlN and Ta. This resulted in a whole set of new precursor materials which are organometallic compounds such as TDMATi, TMA, PDMATa and TBTDETa. Most of these materials are liquid or solid and require special handling and delivery systems. Additionally, many of these materials are highly air sensitive, flammable and pyrophoric, which adds further complexity. Semiconductor chips also have a complex wiring scheme to connect the millions of transistors. The conducting metal is Cu. However additional metals such as Ta and TaN are used to block diffusion of Cu into the rest of the device. Deposition of these films is getting more challenging and ALD is being used to overcome the issues. This is driving demand for new precursors such as PDMATa and in the future Co, Mn, and Ru is being considered as a replacement barrier. Memory devices have seen a similar evolution in materials. A DRAM cell is a combination of a transistor and a capacitor. As the cells got smaller, the charge-holding capacity of a SiO2-based capacitor deteriorated as each capacitor held only a few electrons. Moving to higher-k materials was also the solution. Initially, SiO2 was replaced by Al2O3 and then HfO2, like the gate dielectrics in logic devices, but quickly moved to even higher-k materials such as ZrO2, in some cases combined with Al2O3. Future generations may incorporate even more new materials like barium strontium titanate (BST). Again, deposition of all these new elements requires development of a set of precursor materials that have the right properties. Beyond DRAM, there are several candidates for other memory devices such as Spin Torque Transfer Magnetic RAM (STT-MRAM). These will use magnetic films based on elements such as Fe, Ni and Co and will have a significantly different processing flow. Many of these films will be sputter-coated from pure metallic source targets. The era of getting performance gain through geometric scaling is over and future benefits will come from materials engineering and structural design changes of the devices and the implementation of new materials is just beginning. To solve the shrinking issue, devices are changing from planar structure to 3D structure. Two examples of this are FinFETs, being applied at the 22 and 14 nm nodes for logic devices, and 3D Stacked NAND memory. On the materials front, the big change in the next five years will be the implementation of Ge and III-V materials such as GaAs and InP in the n- and p-channels of logic devices to further improve electron mobility. All these dramatic changes in materials have driven tremendous innovation in chemical synthesis, purification, delivery systems and process equipment. All parts of the supply chain have invested in technology and capacity to enable this materials revolution. The major gas companies, such as Linde, play a central role in delivering these materials to end users. Further out, silicon transistor devices may be partially or entirely replaced by carbon based technology. The two carbon allotropes that are most talked about are carbon nanotubes and graphene. The 1D carbon nanotube material also shows an off state with ultra low electron mobility coupled with low current leakage, making it an ideal material to replace silicon transistors. In fact, in summer 2013, the first – and very simple – computer containing only carbon nanotube transistors was produced. Although much is talked about the 2D graphene, it suffers from an inherent problem when it comes to its use as a transistor; the inability to turn it off. This has led to the first whole system redesign of the transistor since its conception; using an effect called negative resistance to produce a kind of inverted transistor which has the potential to be more efficient and much faster than standard silicon transistors. Both carbon nanotubes and graphene also have the potential to meet the market needs to facilitate a transistor with flexibility, printability and inherently lower costs by both lower raw material cost and lower processing cost. Which technology will win in the end remains to be seen, but one thing is for sure; as society continues to demand increasing performance and reliability from electronics devices, the worldwide drive for fast paced innovation will continue. Linde The Linde Group is a world-leading gases and engineering company with around 62,000 employees in more than 100 countries. In the 2012 financial year, Linde generated revenue of €15.280bn. The strategy of the Group is geared towards long-term profitable growth and focuses on the expansion of its international business with forward-looking products and services. Linde acts responsibly towards its shareholders, business partners, employees, society and the environment – in every one of its business areas, regions and locations across the globe. The company is committed to technologies and products that unite the goals of customer value and sustainable development. Anish Tolia is head of global semiconductor market development for The Linde Group.