The camera-ready, end-to-end HDR ISP leverages the company's proprietary advanced algorithms to accurately tone map high contrast scenes for mission critical applications requiring data-rich, real-time imaging.
Pinnacle Imaging has redesigned its ISP for more efficient power consumption, boosted performance with an expanded 20-bit image processing pipeline and limited latency to less than 20 lines, all with no external DRAM or frame buffers required. According to the company these improvements ensure Denali 3.0 delivers best-in-class image quality for applications demanding native support of real-time high dynamic range video for automotive, security and surveillance, robotics, medical, industrial, machine vision and automated sensory applications.
“As designers continue to expand sensor-based safety mechanisms for ADAS and autonomous robotic applications, the need for ultra-low latency, and high-quality visual data advances at every stage; with Denali 3.0, we are providing the building blocks for the future of these technologies,” said Alfred Zee, CEO of Pinnacle Imaging Systems. “The opportunity to collaborate with industry leaders like Xilinx and ON Semiconductor has afforded us a unique opportunity to build on our high dynamic range ISP and meet the demands of next generation platforms that will service applications of the future.”
Modelled on true human vision, this proprietary technology enables retention of local image contrast as well as details in highlights and shadows, all without producing halos or colour shifts. The fully programmable ISP provides designers with much greater flexibility to customise the processing to meet specific project challenges. Denali 3.0 is also able to support sensors of any resolution, non-traditional colour filter arrays (CFAs) and diverse HDR capture methods. Because Denali 3.0 runs exclusively in the FPGA fabric, designers are able to free up on-chip CPU and GPU resources for advanced artificial intelligence functionality.
Denali 3.0 can be configured to support the complete line of Xilinx Zynq 7000 series and Zynq UltraScale+ programmable SoCs. It also offers native support for the ON Semiconductor AR0233 with a 20-bit image processing pipeline in Super Exposure Mode producing 120dB (20EV) of dynamic range with LED flicker mitigation.