<b>Dr Chris Rowen tells Caroline Hayes why he is excited about the Cadence acquisition and why he still believes the configurable model is the key to moving silicon design forward.</b>
It was a dramatic start to the week for Tensilica's CTO and founder, Dr Chris Rowen. He had completed his first marathon in dramatic fashion– he chose the Boston Marathon, crossing the finish line 10 minutes before the bomb blasts. He then boarded a plane, crossed the continent and arrived in Santa Cruz, California, for the GlobalPress Electronics Summit 2013, where the company's recent acquisition by Cadence was top of the news agenda. When asked about the acquisition, Dr Rowen was enthusiastic. Not surprisingly – the company he founded in 1997 had just been bought for $380million. That is a lot for a company whose 2012 revenue was $44m, begging the question of how big and how valuable is the IP market today? "It depends how you count the boundaries," said Rowen. "IP comes in lots of forms – there are large pieces of embedded software which are just another flavour of IP. The emergence of processors in so many roles begins to break down the difference between software and hardware IP." Evaluating the silicon market at $300 to $400billion, he will only say that of the 10 to 20% of revenue spent on R&D, 'a large part' is in IP development. "As silicon design expertise has become more concentrated in a small number of places and fewer companies feel they need their own fab, so you have an increasingly concentrated set of companies at the leading edge: Intel, Samsung, TSMC and – on a good day – IBM. "Manufacturing capability is available more generically and everybody can share the same transistor. On the other hand, design is much closer to the end user experience and what we expect from the end product has just exploded. So the opportunity for design know how, relative to manufacturing know how, is much greater. Therefore a larger fraction of R&D is going into design and, by extrapolation, into software and hardware IP." Part of the 'explosion' is due to the data-intensive architectures which have needed to grow in terms of computer efficiency. There is also distributed architecture, distributing the communication or application in such a way that real-time events happen on a local device and the part that requires access to a larger database, or the aggregation of information from several sources, happens in the cloud. This scale of distributed, aggregated computing sounds alarm bells for Dr Rowen. "It is a big, big deal when the functionality of everything depends on the availability of the network. I think there is a ticking time bomb in the security and robustness of our networks and we are going to have to work pretty hard [at the aggregation of speed and routing information from the cloud] – and will probably have some major hiccups along the way," he warns. He describes the acquisition by Cadence as a watershed advance in the eda and IP business. It is, he believes 'unique in the industry', meshing as it does Tensilica's strengths in assessing a design's system architecture, the functionality, the algorithms needed to run in silicon to accomplish a particular task and how to put all of that together with Cadence's interconnect blocks, design and verification interactions to build the pieces. The eda company also has a closer view of working with a foundry, the timeline of chip production and verification, whereas Tensilica brings the views of the customer to realise the end product. "There are more synergies than I expected," admits Dr Rowen, yet he confesses he shudders at the thought of the task ahead, not least integrating Cadence IP with the Tensilica portfolio. On the issue of the cpu, Dr Rowen is adamant. His focus is resolutely on configurability. "Extensibility is irrelevant to the cpu," he maintains. The fact that ARM is the de facto standard – and that customers like it – means they are not looking for an alternative. For Dr Rowen, there is no need for an alternative. "ARM is the 'blue collar worker', making the manager look good," he claimed. Another nagging worry is how to differentiate and innovate rapidly, while achieving 10 times more throughput for the same power budget. "The global market is fierce: the penalties for failure and the rewards for success are more pronounced than ever." He is reconciled to the challenge that customers want to be able to use building blocks that are dramatically faster and which feature better energy performance than before. But he also thinks they want to be able to reprogram them arbitrarily or to add new functionality through new firmware without touching the silicon. "These irreconcilable directions present the grand challenges of SoC design," he said. Dr Rowen has an all encompassing industry perspective. Having worked at Synopsys, he understands how eda companies address the IP market by generally looking at the pieces of IP most customers need – such as USB, PCI, PCIe and PHY – rather than the chip's key computational elements. "Simple interface IP blocks are the bread and butter of eda sales channels, whereas microprocessor technology is a differentiator." This understanding has been reached by an architectural dialogue between Tensilica and its customers. "Decisions can be made earlier and at a higher level," he said. "[The acquisition] is a 'game changer', allowing an IP company to make a bigger contribution at different levels." Apart from working for a public, instead of a privately owned, company, what changes will the acquisition by Cadence bring? "Very few," said Dr Rowen, "very few." The engineering and design staff have been retained and he will continue to drive dsp development and work on multicore technology, alongside his new Cadence responsibilities as a Fellow in the R&D department. With all of that, is there time to continue the new marathon running regime? "Oh, yes," was the cheerful reply. Like the IP industry, Tensilica's founder is not likely to stand still. Dr Chris Rowen Dr Chris Rowen – a Fellow in Cadence's R&D department – founded Tensilica in 1997 and acted as its president and chief executive officer until 2008, when he assumed the role of chief technology officer. After graduating from Harvard University with a physics degree in the 1970s, he joined Intel, after which he pursued a doctorate in electrical engineering at Stanford University. As part of his research, he was involved in developing reduced instruction set computing and subsequently cofounded MIPS in 1984, where he became vice president of microprocessor development until leaving in 1996. After a brief stop at Synopsys, where he was general manager of the Design Reuse Group, he founded Tensilica. It was acquired by Cadence in 2013.