26 August 2011

Memory test and repair solution for ARM processor cores

Many large SoC designs today incorporate several third party IP cores that cover a wide range of functionality. These cores often consist of high performance embedded processors such as those available from ARM.

Highly optimised architectures and carefully tuned timing paths are required to achieve ever increasing performance levels in these processors. Integrating design for test capabilities such as memory built in self test (BIST) and self repair capabilities into these cores can affect performance levels because logic typically has to be inserted into functional paths.

Author
Mentor Graphics

Supporting Information

Downloads
36346\2011_MBIST Your ARM Core_whitepaper.pdf

Websites
http://www.mentor.com/

Companies
Mentor Graphics (UK) Ltd

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