26 August 2011 Memory test and repair solution for ARM processor cores Many large SoC designs today incorporate several third party IP cores that cover a wide range of functionality. These cores often consist of high performance embedded processors such as those available from ARM. Highly optimised architectures and carefully tuned timing paths are required to achieve ever increasing performance levels in these processors. Integrating design for test capabilities such as memory built in self test (BIST) and self repair capabilities into these cores can affect performance levels because logic typically has to be inserted into functional paths. Author Mentor Graphics Related Downloads 36346\2011_MBIST Your ARM Core_whitepaper.pdf Comment on this article Websites http://www.mentor.com/ Companies Mentor Graphics (UK) Ltd This material is protected by Findlay Media copyright See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team. Enjoy this story? People who read this article also read... NIDays 2013 NIDays is a technical conference designed specifically for ... Read Article Southern Manufacturing This year, Southern Manufacturing and Electronics is set to be ... Read Article Claire Jeffreys, NEW Claire Jeffreys, events director, National Electronics Week, ... Read Article BEEAs 2010 shortlist announced Findlay Media has announced the shortlist for the 2010 British ... Read Article What you think about this article: Add your comments Name Email Comments Your comments/feedback may be edited prior to publishing. Not all entries will be published. Please view our Terms and Conditions before leaving a comment.