20 November 2009

High speed board layout challenges in fpga/sdi subsystems

This white paper from National Semiconductor outlines the layout challenges facing hardware engineers when working in fpga/sdi subsystems and provides recommendations for dealing with these challenges.

Author
 Tsun-Kit Chin, applications engineer, National Semiconductor

Supporting Information

Downloads
20849\National Semiconductor_Technology Edge.pdf

Websites
http://www.national.com

Companies
National Semiconductor Corp

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