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With size, functionality and cost benefits, ASICs have wider application than you might think

A panel session at last year’s Electronics Design Show Conference addressed the question of whether engineers select the best technology for their next design or fall back on something with which they are familiar.

Clive Bunney, technical director with Swindon Silicon Systems, was a panellist and suggested that engineers shun ASICs because they believe them to be too expensive. “They assume ASICs will cost ‘multimillions of pounds’ and so they can’t use them, but that may not be the case. If you want a small sensor interface which talks to a larger processor system, an ASIC might be appropriate.”

Bunney said ASICs can be appropriate for one of a couple of reasons. “One is if users are looking for price breaks they can’t get with standard products. Another is with space constrained applications, where the solution can’t be developed using multiple parts.”

Mo Wahab, managing director of ASIC services company Delta Microelectronics said ASICs are not necessarily a ‘rich man’s option’. “Over the years, the technology has got cheaper, although at advanced nodes it remains expensive. However, at 180nm, for example, ASICs are much cheaper to access. But silicon isn’t the largest cost; that’s design and IP.”

Both see interest in ASICs reviving. Bunney believes interest has always been there. “But people are looking at ASICs as a way of getting more functions into smaller space. The need to reduce size and power is becoming more important as we move towards the IoT.”

Wahab said: “There is more activity than a couple of years ago, but it’s hard to point to particular sectors, although automotive is interesting.”

So why do designers shrink away from the thought of specifying an ASIC? Bunney said one reason is they think it’s too hard. “But there’s another group which thinks that if a design can be done in standard products, it’s easy to do in an ASIC. That’s not the case.

“In a multichip standard product design, the components are optimised. Building an ASIC from that design involves trade offs and that’s where a system architecture becomes important. For a mixed signal ASIC, there will always be trade offs, so it’s a matter of finding the right ones.”

Wahab said many prospective ASIC users are good at electronics, but don’t know what they want in a chip. “Some can’t put together a chip spec,” he noted. “We can help them to translate their design into a spec. While they know their market and costs, we can guide them through the process.”

Wahab added that, for many of these companies, ASIC isn’t a technology they’ve touched and it’s viewed as costly, difficult and risky. “But, for the mainstream, ASIC designs are generally right first time – if you have a good partner. ASICs are easier to do than in the past and they are not exotic solutions.”

Cost is one reason to think about an ASIC. Wahab said an ASIC is a good solution for when designers find they can’t do a product using standard components. “Their solution maybe too expensive or too large,” he continued. “The BoM for a consumer product could reach $100, but you could do that in an ASIC for $10.”

IP has also been an issue for aspiring ASIC users. Not too many years ago, IP was in short supply, but have things have recently? “Yes and no,” said Bunney. “Where possible, we use IP blocks that have been developed in house, because that helps with time to market and NRE costs. But it’s another example of ‘horses for courses’; you might say an op amp is an op amp, but it isn’t. A standard op amp will work in most cases and we can take that off the shelf, but users come to us for something a bit different, so there will always be customisation and, with it, the need for a high level of specification.”
Wahab pointed to a range of IP providers, offering everything from low level to very expensive blocks. “You won’t struggle to find IP that meets your needs,” he contended. “But the benefit of taking IP ‘off the shelf’, from companies like Delta, is a reduction in risk and time to market.”

So what skills, if any, do potential ASIC users need? “If people come to us,” said Bunney, “it’s either from the position of ‘we don’t know how’ – where they have a high level concept of what they want – or from the position of having build a demonstrator from off the shelf parts.

“In the first case, we can work with them to help them go down the right path. The second case will cause problems because what they have put together uses different technologies.”

Bunney said there can be a lot of ‘gotchas’ in the latter case; for example, the demonstrator may use things like high precision resistors, which can’t be integrated into an ASIC. “We then have to find ways around the problems by rethinking the architecture. But don’t think an ASIC can do everything – that may not be the case.”

Neither should users expect all blocks to have high performance. “Noise isolation is an example,” said Bunney. “Because an ASIC is monolithic, all transistors are connected in some way to everything else. That means a noisy circuit will interact with other areas. We need to do our due diligence to minimise those effects.”

Wahab said first time users need a partner on whom they can rely. “They need to do a spec, then a design, then sign off at different stages. It’s hard for them to sign off before tape out, so we have to give them confidence. With more advanced customers, we can support them in parts of the development cycle.”

Like Bunney, Wahab pointed out that ASIC design involves trade offs – and one is the fact that you can’t integrate everything. “And it’s not always wise to do so,” he counselled. “Certain parts of a design are suitable for an ASIC, other parts aren’t.” He gave wireless blocks as an example. “There are plenty of transceivers on the market.”

He also counselled against being set on a single chip solution. “People like the idea, but sometimes it makes sense to split the design into two. High performance digital can be integrated and produced on an advanced node, while RF and analogue can be housed on a separate chip. You can then take advantage of packaging solutions to integrate the two chips and even include passives.”

Advice? “Think clearly,” said Wahab. “If you don’t or if you want to add new features at the wrong time, it can cost a lot of money. And don’t split the work between suppliers; if you do, you lose the ability to hold one partner to account.”

Bunney: “You can build some flexibility into the design if it’s in the spec. But you have to know what you want because making changes is costly. Spend time up front getting it right.”

Author
Graham Pitcher

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