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VPX development platforms can reduce time to market

New generations of embedded computing systems based on the VPX standard reflect the growing significance of high speed serial switched fabric interconnects. These are replacing traditional parallel communications bus architectures for local communications because of their increased performance.

Switched fabrics also provide an optimum way to support the implementation of multiprocessing systems, such as digital signal processing applications that require the fastest possible communications between multiple processors.

VPX (VITA 46) is a VMEbus based standard that retains VME's existing 3U and 6U form factors and adds support for switched fabrics over controlled impedance, low crosstalk 6.25Gbits/s connectors, with boards typically spaced on a 1in (5HP) pitch. Developed primarily to increase the I/O capability and bandwidth of VME, it supports high speed serial interconnects, such as PCI Express, RapidIO, Infiniband and 10Gbit Ethernet, while maintaining the maximum possible backwards compatibility with VMEbus.

As well as the switched fabric interface, VPX also supports PMC and FMC (VITA 57) as mezzanine cards and XMC (VITA 42) via an additional P5 connector. Hybrid backplanes to accommodate VME64, VXS and VPX boards are also specified to maximise backwards compatibility.

As the VPX specification evolved, the baseline electrical and mechanical VITA 46.0 standard was rapidly augmented with a further 10 'dot level' specifications, moves which created a range of application specific – and potentially non compatible – options. Given that each top level 'dot' specification defines a considerable number of standard alternatives, the fundamental benefits of standardisation were soon lost in the overwhelming number of possible options.

As VPX has evolved from VMEbus, it has been designed into a number of high profile military programs. Responding to pressure from military users to bring a compatible set of draft specifications to finalised status, the OpenVPX working party, consisting of some 30 companies, was formed. This body developed OpenVPX (subsequently published as VITA 65) in response, bringing a limited number of system topologies to completion. However, while OpenVPX compliant systems are a small subset of the total available number of options, it still allows for several thousand possible alternatives.

While relevant for the ruggedised environments to be found in military, transport and aerospace applications, full OpenVPX compliance is not generally necessary for commercial applications.

OpenVPX is a system level specification, defining additional thermal management, EMC, shock and vibration immunity requirements, in addition to the fundamental VITA 46 electrical and mechanical requirements. OpenVPX defines the technical implementation details for 3U and 6U VPX payload and switch modules, backplane topologies and chassis configurations to provide clear guidance on how to build interoperable computing and communication platforms.

Increased capability invariably leads to higher power requirements. A VMEbus slot is limited to a maximum of 90W at 5V; VPX raises this to 115W at the same voltage, up to 384W at 12V and 768W at 48V. To manage issues arising from higher power levels, VITA 48.0 – also known as REDI, Ruggedised Enhanced Design Implementation – calls for ESD metal covers on two sides of VPX boards and allows for forced air, conduction and liquid cooling implementations. Like OpenVPX, conforming to REDI is, arguably, a step too far for the development environment and for systems deployed in purely commercial applications.

A number of manufacturers have announced products based on the VPX standard, in both 3U and 6U form factors. These include single board computers, based on both Intel and PowerPC architectures, multiprocessors, graphics processors, fpga based processing modules, mass storage, switches and complete integrated subsystems.

A potential constraint to the wider use of VPX systems has been the lack of a suitable entry level development platform that provides a basic physical environment for software development and board integration. Feedback from Verotec's customers, who are investigating the potential of VPX for non military systems, showed that, while most applications may eventually require a custom backplane, there is a distinct shortage of a 'basic' hardware platform. To address this gap in the market, Verotec has introduced the TecSYS VPX development platform. A modular system assembled from standard building blocks, TecSYS is user configurable around the default options if required.

The 3U TecSYS VPX is housed in a 10.5in half width 6U, 322mm deep Diplomat enclosure. This is configured with a 2U plenum chamber at the bottom, a 3U KM6-RF subrack in the middle and a 1U air exhaust chamber at the top. At the heart of the system is a five slot 3U full mesh X4 PCI Express VITA 46.4 backplane. There is also a VITA 46.10 rear transition module, an important consideration for I/O, that can be accessed readily through a removable rear panel. Meanwhile, the top cover is removable for improved access.

The backplane provides system management and boundary scan interfaces. This configuration gives 'fat pipe' communications between all five slots and provides an interface with PCI Express, one of the most widely used architectures. Power for the main rails – +3.3V, +5V and +12V – is provided via M4 studs, each rated at 40A. This gives some headroom above the VITA 46.0 maximum of 36A per slot. While designed initially to meet the needs of the VPX development community, TecSYS' modular, scalable design enables it to be used for developments based on other 3U and 6U bus structures, such as VMEbus, VME64 and cPCI.

Up scaling is simple: if a 6U system is required, the case size is increased to 9U, the pluggable power supply increases to a 6U version and the backplane, conforming to any of the standard bus structures, changes to a 6U form factor. Thermal management implementation remains the same, there are no non recurring engineering charges and delivery times are short, reducing time to market.

System power is provided by an auto ranging PFC modular pluggable power supply fitted with a standard PICMG 47pin connector. The supply connects into a power interface board, which feeds power to each slot's M4 stud. The 300W supply features two independent converters operating in parallel, enabling it to provide 30A at 5V and 40A at 3.3V simultaneously. Thermal management is provided by two dc fans installed below the subrack to give bottom front to top rear forced ventilation for the power supply and system boards. If required, additional fans can be mounted at the top of the rear panel to give push-pull cooling. The 2U front panel is fitted with power and fan indicators and an ESD wrist strap bonding point.

In addition to the development environment, TecSYS is portable, compact and quiet. Its attractive appearance enables it to be used as the enclosure for target systems and at exhibitions and customer demonstrations

While most VPX systems will benefit from a custom backplane to enable them to operate to their full potential when they migrate to volume production, the TecSYS VPX development platform provides a real world environment for software and hardware design during the development phase of the project.

Martin Blake is technical applications manager with Verotec.

Martin Blake

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