comment on this article

Top 10 converter tips

A set of often overlooked, but nevertheless important, a/d converter specifications.

With so many analogue to digital converters available, it is always difficult to know which is right for a given application. Data sheets often confuse the issue and many specifications impact performance in unanticipated ways.
When selecting converters, engineers may simply look at resolution, signal to noise ratio (SNR) or harmonics. While these are important, other specifications can be equally significant.

1: Resolution
Resolution is, perhaps the most misunderstood specification. It refers to the number of output bits, but provides no useful information on performance. Some data sheets list effective number of bits (ENOB), which uses actual signal to noise (snr) measurements to compute the converter's effectiveness.

NSD can be calculated by knowing the sample rate, input range, snr and (for dBm/Hz) input impedance. Once these are known, a converter can be selected to match the analogue performance of the front end circuitry. This is a better method of selecting an a/d converter than simply reviewing the resolution.
Many users are also concerned with spurious and harmonic performance. While these are not related to resolution, converter designers generally adjust their designs such that harmonics fall in line with resolution.

2: Power supply rejection
Power supply rejection (PSR) measures how power supply ripple coupled to the a/d converter's input appears on its digital outputs. With limited PSR, noise on the power supply line will be suppressed to only 30 to 50dB below the input level.
Normally, the unwanted signal on the power supply is relative to the input range of the converter. For example, if the noise on the power supply is 20mV rms and converter's input range is 0.7V rms, then the noise on the input is –31dBFS. If the converter has a 30dB PSR, coherent noise would show up as a –61dBFS spectral line in the output. PSR is important in determining how much filtering and decoupling the power supply will need. PSR is important in high noise environments, such as medical or industrial applications or where dc/dc converters may be used for high power efficiency.

3: Common mode rejection
Common mode rejection (CMR) measures the induced differential mode signal in the presence of a common mode signal. Many a/d converters employ differential inputs to provide high immunity to common mode signals and because differential input structures naturally reject even order distortion products.
As with PSR, common mode signals can be induced by power supply ripple, high power signals induced on the ground plane, rf leakage through mixers and rf filters, and in applications where high electric and magnetic fields are found. While many converters do not specify CMR, they often have a CMR of 50 to 80dB.

4: Clock slew rate
This is the minimum slew rate required to achieve the rated performance. Most converters have sufficient gain on the clock buffer to ensure that the sample instant is well defined, but excess noise will occur if the slew rate is slow enough to produce a high degree of uncertainty of the sample moment. If a minimum input slew rate is specified, users should meet that requirement to ensure the rated noise performance.

5: Aperture jitter
Aperture jitter is the internal clock uncertainty to the a/d converter. The noise performance of the a/d converter is limited by the clock jitter, both internal and external.
In a typical data sheet, aperture jitter is stated for the converter only. External aperture jitter sums in an rms manner with internal aperture jitter. For low frequency applications, jitter may be unimportant, but as the analogue frequency increases, noise due to jitter becomes an increasing concern. Failure to use an adequate clock will result in poorer than expected performance.
In addition to increased noise from clock jitter, spectral lines in the clock signal that are not related harmonically to the clock will show up as distortion on the digitised output. Therefore, the clock signal should have the highest possible spectral purity.
For more details on the effects of aperture jitter, see applications notes AN501 and AN756 at

6: Aperture delay
This is the time delay between the application of the sampling signal and the moment the input signal is actually sampled. This time – typically a nanosecond or less – may be positive, negative or even zero. Unless knowing the exact sampling instant is important, aperture delay is unimportant.

7: Conversion time and latency
These two parameters are two closely related specifications. Conversion time generally applies to successive approximation converters (SAR), where a high clock rate is used to process the input signal, which then appears on the output much later than the conversion command, but prior to the next conversion command. The time between conversion command and conversion completion is the conversion time.
Conversion latency is usually applied to pipelined converters. A measure of the number of pipelines (internal digital stages) that is used to produce the digital output, conversion latency is usually stated in terms of pipeline delays. Actual conversion time may be calculated by multiplying this number by the sample period used in the application.

8: Wake up time
To conserve power in power conscious applications, the converter is commonly powered down during periods of relative disuse. While this does save considerable power, a finite amount of time is required for internal references to stabilise and for internal clock functionality to resume when the device is turned back on. During this time, conversion data produced will not meet specifications.

9: Output loading
Like all digital output devices, a/d converters – especially cmos output devices – specify output drive capability. While it is important to know this value for reliability reasons, optimal performance will usually occur at less than full drive capability.
In high performance applications, it is important to minimise the output loading and to provide proper decoupling and an optimised layout, minimising voltage drop on the supply. To avoid these problems, many converters provide lvds outputs. Because lvds is a symmetric, switching currents are reduced and overall performance is improved. If available, lvds outputs should be used to ensure best performance.

10: Monotonicity
In a non monotonic converter, the digital codes exhibit a localised change in the sign of the slope. So for a constantly increasing analogue input, the digital output exhibits a localised change in slope from positive to negative and back to positive. For applications where the a/d converter is part of a closed loop, such behaviour can cause loop instability and poor performance. For such applications, a converter should be carefully chosen to ensure that it has monotonic performance.

Brad Brannon, systems applications engineer within Analog Devices’ high speed converters group

Related Downloads

Comment on this article

This material is protected by MA Business copyright See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team.

What you think about this article:

Add your comments


Your comments/feedback may be edited prior to publishing. Not all entries will be published.
Please view our Terms and Conditions before leaving a comment.

Related Articles