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On the burst

SRAM solutions for high speed networking. By Graham Pitcher.

The push towards ever higher data rates poses problems for engineers designing communications systems. In particular, the need to move data around so quickly puts serious pressure on system memory.

Historically, communications systems designers used the same type of sram found in pc cache memory. But increasing data rates mean this approach cannot be used any longer.

Memory developers have overcome this problem with devices that perform more than one read and write per cycle. One solution is memory devices in which dedicated input and output ports run independently and perform two reads and two writes per clock cycle, hence running four times the speed of a 'standard' sram – or quad data rate (qdr). And the companies developing these devices have gathered together under the name of the QDR Consortium.

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Graham Pitcher

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