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Move to 3D flash memory set to boost prospects of SSDs

Developers of memory devices of all types have generally been the first customers for the latest process technology. A combination of the need to make memories with greater capacity at lower prices has pushed manufacturers to the ‘bleeding edge’. That combination of dynamics has also pushed some manufacturers ‘over the edge’ and the remainder into joint ventures that can cope with the commercial and technical challenges.

The two most popular memory technologies today are DRAM and flash – and both are beginning to experience issues as process technologies get ever smaller.

A DRAM cell comprises a transistor and a capacitor, which stores electrons and provides the indication of a 1 or a 0. As process technologies shrink, so too does the size of the capacitor and the number of electrons which can be stored. One way of delaying the inevitable is to create capacitors which have a large aspect ratio – thin and tall.

Flash has a different arrangement; electrons are stored on a floating gate. Because of the construction of a flash cell, it’s non volatile and is therefore popular for long term storage. But it has the same problem as DRAM; as process technology shrinks, fewer electrons are stored and reading that 1 or 0 becomes more of a challenge. In fact, at the ‘bleeding edge’, that 1 might be represented by the presence of as few as 20 electrons. Not only that, the smaller the flash cell, the less durable it becomes.

Memory developers have been working over the last few years on ways to overcome these challenges. One part solution of the solution is to adopt more rigorous error correction (ECC) techniques. However, as dimensions shrink, host controllers become a critical part of the memory, not only handling ECC, but also wear levelling and similar functions.

Another, more radical solution has been to place less emphasis on process shrinks and more on heading upwards.

Axel Stoermann, general manager of memory technical marketing and application engineering with Toshiba Electronics Europe, said: “Recent advances in semiconductor production technologies have enabled engineers to fabricate chips containing three dimensional stacked cell structures. These structures not only answer the clamour for increased bit density, they also overcome many of the challenges caused by lithographic die shrinks.”

The basic idea of 3D NAND is to stack the storage cells vertically, increasing bit density radically compared with planar NAND flash. Toshiba has recently announced a 48 layer flash memory structure called BiCS, short for Bit Column Stacked. The approach is said to surpass the capacity of mainstream 2D NAND flash whilst enhancing write/erase reliability, endurance and write speeds.

Stoermann noted: “The BiCS architecture uses charge trap cells that store electrons in a silicon nitride layer, rather than the doped polycrystalline silicon typical of the floating gate cells used in 2D NAND. These new charge trap memory cells are far more durable than floating gate cells.”

Essentially, because charge trap memory cells store electrons in a silicon nitride layer, rather than in the polycrystalline silicon used in 2D devices, they don’t ‘leak’ electrons as readily. BiCS features U shaped strings of memory cells; an approach that not only increases array efficiency, but is also compatible with current manufacturing technology. Because the spacing between cells is increased, noise and interference is reduced. This supports sequential write speeds greater than those found in 2D devices. Stoermann said: “A BiCS device will achieve sequential write speeds in excess of 30Mbyte/s; much faster than that offered by 15nm triple level cell 2D parts. This equates to a data transfer rate of around 533Mbit/s for BiCS devices.”

Samsung has also developed 3D memory technology, launched in 2014 as 3D V-NAND and sees solid state drives (SSDs) as one application which will benefit. Like Toshiba, Samsung has pushed the technology to 48 layers of memory cells.

It has already started production of 256Gbit 3D V-NAND memories. These devices feature 48 layers of 3bit multi level cell arrays. In total, there are more than 85billion cells.

But, says Thomas Arenz, director of Marcom/SBD at Samsung Semiconductor Europe, more is needed than 3D memories; there are issues relating to their storage to size ratio and the speed with which data can be read and written.

When the first SSDs appeared, they featured SATA and SAS buses, allowing them to interface with the host computer. “At the time,” said Arenz, “these buses worked well because SSDs and hard disks were comparable in terms of speed. Now, the speed of SSDs has increased significantlyand these buses are starting to hold SSDs back.

“While V-NAND technology has played a role in aiding the adoption of SSDs, one ‘killer app’ component had yet to evolve – Non Volatile Memory Express, or NVMe.”

According to Arenz, this ‘killer app’ was never really an ‘app’. “Rather, it was a combination of three separate developments – the rise of big data; the launch of 3D V-NAND; and the development of NVMe firmware.”

NVMe is a communications interface protocol that works as part of the host server’s PCIe bus. An NVMe enabled PCIe works with the latest SSDs to boost data rates. While PCIe 3.0 offers 985Mbit/s per lane, installing a card in a PCIe 3.0 slot will boost bandwidth to 4Gbyte/s.

Despite the attraction of 3D NAND flash, Stoermann says it’s unlikely that it will displace its 2D cousin, claiming the two variants will coexist. One reason for this is that Toshiba will not be offering the technologies in the same capacities. “2D NAND tends to reach a maximum of 128Gbit per chip,” he said. “BiCS devices will target capacities greater than that.”

But there is an ‘elephant in the room’, if we can call it that, in the shape of 3D Xpoint technology, recently announced by Intel and Micron.

It’s billed as the first new type of memory to be introduced in more than 25 years. What the two companies have said is that 3D Xpoint is 1000 times faster than NAND and 10 times denser than conventional memory. What the developers haven’t said is how it’s done, which has opened the field to speculation. Currently, the favourite theory is that 3D Xpoint is some kind of phase change memory.

Intel is bundling 3D Xpoint, a system memory controller, interface hardware and software under the Optane brand. It says the first Optane products will be ‘high endurance, high performance’ SSDs and these will be available early in 2016. Interestingly, while companies such as Toshiba and Samsung believe their 3D NAND technology will be used almost exclusively in enterprise applications, Intel says Optane will also be targeted at consumers.

Author
Graham Pitcher

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