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Going for a revamp

Will the improvements made to PCI X include enough headroom to meet the next decade’s server requirements? By Vanessa Knivett.

Despite being a revamp of existing technology, PCI X 2.0 is on a winning streak. At least that is the message from the PCI SIG forum – the trade group responsible for developing the PCI bus specification and overseeing its implementation.

PCI X is based on the popular pci bus first introduced to the world some twelve years ago. Notes Tom Cox, Tundra Semiconductor's director of strategic marketing and a member of the original PCI board: "At the time we developed the specification, we had no idea it would last as long as it has." During this time, PCI has gained a reputation for being a reliable, general purpose I/O interconnect. In effect, version 2.0 extends the bus' lifetime for a number of years to come.

The PCI bus began with a 32bit/33MHz specification and over time, 64bit and 66MHz versions were introduced. To increase the bus speed and reduce latency PCI X 1.0 was developed – clock speeds of 133MHz were introduced and the protocols were significantly improved. PCI X was originally put forward by Compaq, IBM and HP in September 1998 as a way of doubling the performance of the PCI bus whilst retaining customer ownership costs. It is now on its second itineration, with a third evolution currently under investigation.

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Author
Graham Pitcher

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