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From fad to fashion

Silicon on insulator wafers are rapidly gaining ground as the next ‘must have’ process technology. By Louise Joselyn.

Although bulk cmos processes continue to dominate the semiconductor market, silicon on insulator (soi) technology is on a roll. Major independent device manufacturers, foundries and fabless vendors are increasing their commitment to soi as they recognise the benefits that can be gained.
In essence, the primary advantages of circuits built on soi wafers are higher speed and reduced power consumption – and these benefits are applicable to a range of devices. For memories, there are the added benefits of higher density and improved scalability. However, an overriding factor in the thinking of many ic designers is the problem of leakage current, which is becoming a major issue as geometries shrink.
If high performance, low power consumption and greater density are not enough, there is another significant advantage of switching to soi wafers: the technology is inherently resistant to cosmic radiation (see NE 9 Jan 2007). Few soi vendors highlight this fact, perhaps because awareness of the problem is low, but this will change at smaller geometries, where bulk cmos devices are considerably more sensitive to cosmic radiation.

Author
Louise Joselyn

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