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Technology Filtered by - Programmable Logic

New Electronics strives to bring you all the latest technology news from the Programmable Logic sector. Advances in electronics are often fast-paced and innovative, so we know that as a design engineer you want to be kept up-to-date with current developments.

Below is a comprehensive list of all the latest electronics technology news from New Electronics.

Many core solutions meet growing demands of comms processors

The volume of data being transmitted around the globe is reaching staggering levels – and we 'ain't seen nothing yet', according to leading players in the sector. Dealing with this traffic, while maintaining low power consumption, is pushing device developers to create ever more complex comms processors.

FPGA developers square off at 20nm

Programmable logic is one of the first technologies to be manufactured on the latest process node. In the past, fpga developers have taken advantage of this to bring larger capacity devices to market as soon as possible in an effort to meet the needs of leading edge customers.

FPGA industry rises to the challenge of 28Gbit/s transceivers

At last month's European Conference and Exhibition on Optical Communication, Altera demonstrated an fpga implementing a 100Gbit/s link using four 28Gbit/s transceivers. The Stratix V GT fpga, working alongside chipmaker Gennum's clock data recovery circuits, used the transceivers –each operating at 25.8Gbit/s – to send 100Gbit/s of data over 7in of Nelco 4000-13 pcb material, exceeding the specification requirement of 4in.

CPLD flexibility enables wide application

Once simple to understand, programmable logic is now a complex world, with devices of all types apparently providing solutions to most design requirements. Despite this wide range of solutions, the industry's focus remains assuredly on the leading edge.

Debugging methods for FPGAs

There are several debugging methods available for fpga design, including simulation at the RTL and gate level, static timing verification and debug at the hardware level.

FPGAs back design call

Sanctioning the development of an assp is a tough call for the ceo of a telecom chip company. Given the depressed marketplace, an expensive chip design project only makes sense if telecom equipment makers commit to using your planned ic

Connectivity, dsp and low power consumption

With the attention given by programmable logic companies to potential applications, you could be forgiven for assuming the market was covered by a range of devices. But not so, at least in the opinion of Doug Hunter, corporate vice president of marketing for Lattice Semiconductor.

Nice threads!

A different hardware and software approach is boosting network processor efficiency. By Graham Pitcher.

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