FGPA/ASIC/DSP

Despite the availability of a range of commodity products, designers often need to turn to custom devices to meet particular needs. But which technology best suits the application? Should you base your design around an FPGA or is it better to use an ASIC? Can you meet your design requirements using a DSP?

In this section, New Electronics brings you the latest developments from the advanced platforms market, looking at how to develop and apply FPGA, ASIC and DSP technology.

FPGA developers square off at 20nm

Programmable logic is one of the first technologies to be manufactured on the latest process node. In the past, fpga developers have taken advantage of this to bring larger capacity devices to market as soon as possible in an effort to meet the needs of leading edge customers.

Design exploration: changing the fpga design flow

FPGAs have undergone significant architectural changes in the last few years. Beginning with hard blocks such as ram and dsp, fpgas now also include transceivers and hard IP blocks, such as Ethernet and PCIe Express. With these new functional blocks, fpga designers can now create complex designs. However, these designs can sometimes push the cost, power and performance specification requirements of the targeted fpga device.

Roundtable: Will the mcu-fpga combination remain a high end solution?

In the late 1990s, a leading fpga company launched a campaign under the heading of 'system on a programmable chip'. The idea was that the combination of a programmable logic fabric and a soft processor would help to cut time to market and reduce development costs. For a number of reasons, the idea didn't catch on quite as anticipated.

ARM's big.LITTLE systems provide more processing power for less energy

Traditionally, it has not been possible to design a processor that offers high performance and high energy efficiency. Solutions have typically involved integrating processors with microarchitectures optimised for performance and energy efficiency respectively. An example is a high performance application processor coupled with a low power asic.

Can tweaking the analogue properties of digital circuits help to combat the effects of variability?

As semiconductor process technologies get ever smaller, the effects of stochastic variability become more pronounced. It's no surprise: because there are fewer atoms involved, the presence or absence of a small number of dopants can have large effects on device properties. Where variability was predictable at earlier process nodes, it is more random – or stochastic – at the leading edge.

FPGA industry rises to the challenge of 28Gbit/s transceivers

At last month's European Conference and Exhibition on Optical Communication, Altera demonstrated an fpga implementing a 100Gbit/s link using four 28Gbit/s transceivers. The Stratix V GT fpga, working alongside chipmaker Gennum's clock data recovery circuits, used the transceivers –each operating at 25.8Gbit/s – to send 100Gbit/s of data over 7in of Nelco 4000-13 pcb material, exceeding the specification requirement of 4in.

CPLD flexibility enables wide application

Once simple to understand, programmable logic is now a complex world, with devices of all types apparently providing solutions to most design requirements. Despite this wide range of solutions, the industry's focus remains assuredly on the leading edge.

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