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Technology Filtered by - EDA

New Electronics strives to bring you all the latest technology news from the EDA sector. Advances in electronics are often fast-paced and innovative, so we know that as a design engineer you want to be kept up-to-date with current developments.

Below is a comprehensive list of all the latest electronics technology news from New Electronics.

Balanced approach matches analogue design requirements

Despite its continuing – and, in many cases, increasing – importance in modern chips, analogue and mixed signal (AMS) design has proved difficult to automate. While digital design automation has seen rapid advancement during the last 30 years, the only major step forward for AMS designers has been the introduction of foundry verified cells, termed by various eda vendors as T-Cells, PCells, Mcells, Flexcells or Pycells. Beyond this, remarkably little has changed: it is not uncommon to find AMS designers relying on their expertise, experience and 'feel' to perform polygon based layout by hand. But, as design complexity has increased, this approach is becoming increasingly untenable.

FPGA-PCB codesign; a 21st Century approach to integrating fpgas into the pcb design process

Integrating advanced fpgas on a pcb is becoming increasingly challenging, with issues including generating optimal fpga pin assignments that do not add layers to a pcb or increase the time required to integrate the fpga with the pcb design. Because of this, fpga designers, schematic engineers and pcb designers struggle to create fpga pin assignments that meet the goals for the entire system.

Chip designers move up to the next level of abstraction

Engineers recognised years ago that increasing chip complexity meant they had to move to a higher level of abstraction. The problem has been determining precisely what this 'next level up' is and then making the connection back down to rtl code for physical hardware implementation.

Starting out

SAME offers a good showcase for start ups; particularly those offering eda tools. By Louise Joselyn.

Digital takeover

Analogue designers are having to be increasingly innovative to overcome process scaling problems. By Chris Edwards.

Modelling parasitics in sub-micron IC designs

IC designers who work at the deep submicron level know that smaller process size means lower per unit costs, higher performance, and lower power consumption. However, as nets get closer together, parasitic capacitance becomes a design consideration.

The high cost of low cost development kits

A major challenge for any business, particularly in the current economic climate, is how much do you invest in staff and equipment to achieve your profitability goals. Overdoing that spending will wipe out the potential increases in profit, yet under investing leaves you ill equipped to capitalise on the market possibilities or even exposed to a risk of not achieving them.

Solving the DFM puzzle

Until now, design for manufacturing has been all about the individual processes. If it is to be successful, it must be applied on a broader scale.

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