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Calculated bets in embedded design

Arithmetic performance has become the latest battleground for mcus as they take on dedicated hardware and dsps.

If you wanted to implement high speed digital signal processing in an embedded system a decade ago, you had to use a part designed specifically for that job. But improvements to microcontroller architectures have brought high performance maths support to a wider range of processors.

Jim Stuart, Freescale's product marketing manager for industrial and multimarket parts, says a move to more advanced motor control techniques and a shift to sensorless systems is 'really driving the requirement for higher performance mathematics across the board'. "We are seeing a big move in the power supply market away from analogue to digital systems that need very fast mathematic capability."

Ross Mitchell, Freescale's embedded systems engineering manager, explains: "A lot of them are dc/dc power units for telecom systems. Heat is a big problem: these units are really small for their power, but need forced air cooling. If you improve efficiency from 82% to 87%, it doesn't sound much, but the waste heat drops by a half."

Anders Frederiksen, segment marketing manager for motor and power control at Analog Devices, reckons: "A lot of the advanced mathematical models that could have been used in real time control were 'dumbed down' because, in the past, there wasn't sufficient performance."

It's not just control. Haakon Skar, Atmel's AVR product marketing director, points to consumer applications as targets for a new generation of maths enhanced microcontrollers. Apparently simple changes, such as the addition of fixed point arithmetic, rather than traditional integer processing, can make a big difference.

Fixed point arithmetic was the original feature of the dsp, but a cross pollination of architectural features has made the choice between mcu and dsp more finely balanced. "You gain the benefit of precision," Skar claims. "This is the key to MP3 decoding. If we didn't have fixed point, we would have to use a lot more integer instructions."

The instruction pipeline is generally the biggest difference between mcus and dsps. As they are optimised for running tight, repetitive loops to compute filters, a long pipeline allows very fast cycle times. This, in turn, drives the use of multiple data buses, with data split between memory blocks. Mitchell says the pipeline becomes a problem for the dsp when it comes to dealing with multiple tasks and interrupts. "Microcontrollers are better when there is lots of branching. The dsp is really designed for multiple iterations of one loop."

Realising that dsps were being used increasingly for control, suppliers such as Freescale and Microchip either found ways around the interrupt latency issue or developed hybrid architectures that combined dsp features with the short pipeline of a typical mcu. The result was the digital signal controller (dsc).

Stuart says: "We have added shadow register banks, so we have the ability to do fast interrupt handling. We can't do deep nesting because there is a limited number of shadow banks, but it provides the ability to do a certain amount of very fast interrupt handling."
Microchip's dsPIC was one response to the merger of dsp and control. It has a comparatively short pipeline like an mcu, but has dedicated memories for dsp instructions, separate to a unified data memory that is used for mcu style operations.

Like Freescale, Microchip has implemented shadow registers for faster interrupt handling, Bryan Kris, dsPIC architect, explains: "Often, for control loops, the dsp functions are implemented in the interrupt service routine to reduce the latency from the data input, such as the a/d converter, to the data output."

Although mcus have progressively added more maths functions, the focus remains one of simpler software development.

Geoff Lees, general manager of NXP's microcontrollers operation, explains his company's decision to licence the Cortex-M4 from ARM, an mcu that borrows maths and dsp functions from the higher end Cortex-R family. "The appeal of the M4 is having a single unified architecture with one core. There have been control cores that have merged capabilities, such as the Infineon Tricore, and dsps that have added support for control, but none have the ecosystem that the ARM microcontroller architecture has today."

Suppliers such as Analog Devices and Atmel argue that a combo mcu and dsp can offer the best of both worlds. But there are still trade offs inherent in the architectures that often signal their heritage. Analog Devices' Blackfin, for example, has a 10 stage pipeline, but includes a set of mcu instructions. Atmel's AVR has a very short pipeline, but uses fast on chip memory to support filter operations.

Skar says Atmel's approach goes beyond simply adding instructions; focusing attention on system design issues that, in a conventional processor, put heavy demands on the core. Event routing, in which triggers connect hardware units such as DMA controllers directly without demanding a response from the processor and a technique the company calls 'sleepwalking' help reduce the software load.

"You can get fantastic communications rates with very little input from the cpu, which is now free to do signal processing," Skar claims.

"Sleepwalking got its name because a peripheral such as an a/d converter has the intelligence to decide 'do I want to forward this to the cpu?'. It can do things like monitor the battery voltage, only telling the cpu when it drops below a critical level.

"It can run in the background while the cpu is sleeping. It eliminates billions of interrupts, which extends battery lifetime, and you can make the interrupt priority of this event very high because we know that when it happens it's very important."

The alternative approach is to split the workload across two dedicated processors, an approach that Elizabete de Freitas, product marketing manager for Texas Instruments' Sitara range, says works well when both 'control and signal processing functions are equally dominant'.
Competitors, however, argue that multicore development can be more difficult to deal with, as it demands effective synchronisation between the two sides to avoid race conditions.

"I think multicore with different architectures would be much more difficult for customers in the microcontroller world," says Lees.
Skar claims: "A lot of the features we have built in push the time when you need to look at dual core further into the future. We don't see any dual core controllers on the horizon."

Stuart points out that having two processors in one system can simplify other aspects of the design: it can be easier to determine relative task priorities where two processes can run simultaneously. "Even with something relatively simple like a washing machine, 70% of the market uses separate controllers for the user interface and for motor control. It also lets you separate the high voltage and low voltage sides."

Speeds will improve, but engineers will still need to look at the tradeoffs between compute performance and responsiveness and other factors when implementing maths driven algorithms in control.

Chris Edwards

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