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Buses avoid delays

A nine layer bus matrix and 18 DMA channels overcome data bottlenecks in graphics intensive applications.

In the last three decades or so, the microprocessor has changed almost unrecognisably. The first device which could, arguably, be called a microprocessor was Intel’s 8080. The 8bit part, which ran at all of 2MHz, established the x86 dynasty. Since then, the microprocessor has evolved continuously and clock rates have exceeded 3GHz. Today, Intel is manufacturing quad core devices – effectively bringing supercomputer level performance to the desktop.
Intel, of course, is just one microprocessor manufacturer, albeit a dominant player. Alongside, a range of companies develops products for the market. All have taken advantage of Moore’s Law to turn the clock rate up with each new process technology. But certain elements haven’t always kept up with what seemed to be clock rate centric development.
Atmel points to graphics intensive applications as an example. It claims the microcontrollers that drive these applications must store, process and move ‘massive amounts’ of data at high rates between peripherals, processor and memory.

Graham Pitcher

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