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Bursting through

Meeting the needs of modern high bandwidth communications and networking applications. By Helmut Schock.

The need to transfer ever larger data volumes more quickly – coupled with quality of service requirements and the use of multiple protocols – is fuelling demand for higher performance communications and telecommunications equipment. As a result, designers of such devices as switches, routers and multiplexers must turn to increasingly complex, high performance network components if they are to deliver the necessary bandwidth. And demand for increased bandwidth means that new optimised memory technologies are required.

Memory requirements
Until recently, telecommunications and data communications applications have generally used the inexpensive technologies employed in computer cache memories. Packet based network speeds, for instance, have traditionally been slow enough that designers could use standard burst style srams. These memories, however, cannot match the performance demands of emerging applications.

For example, in the latest packet based communications systems, memory access will generally be required for three categories of operation: packet buffering; table storage; and fast lookup. As well as high speed, low latency operation, such operations typically need to turn around quickly from memory reading to memory writing and vice versa. Whilst designed for very fast read operations, the conventional synchronous memory used for cache applications has an inherent bus turnaround delay when switching between read/write modes.

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Graham Pitcher

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