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Xilinx unveils FPGA acceleration stack

Xilinx has unveiled a FPGA-powered reconfigurable acceleration stack that includes libraries, framework integrations, developer boards, and OpenStack support.

According to the company it will provide the fastest path to realize 40x better compute efficiency with Xilinx FPGAs when compared to x86 server CPUs and up to six times the compute efficiency over competitive FPGAs.

Using dynamic reconfiguration, Xilinx enables silicon optimisation for the broadest set of performance-demanding workloads including machine learning, data analytics, and video transcoding. These workload optimisations can be done in milliseconds by swapping in the most optimal design bitstream.

At present Xilinx FPGAs enable hyperscale data centers to achieve 2-6x the compute efficiency in machine learning inference because DSP architectural advantages for limited precision data types, superior on-chip memory resources, and greater than one year technology lead over FPGA competition.

The Xilinx Reconfigurable Acceleration Stack includes math libraries designed for cloud computing workloads, application libraries integrated with major frameworks, such as Caffe for machine learning, a PCIe-based development board and reference design for high density servers, and an OpenStack support package making Xilinx FPGA-based accelerators easy to provision and manage.

“The new stack will help to accelerates mainstream adoption of our FPGAs in hyperscale data centres,” said Nazeem Noordeen, corporate vice president, IP Solutions at Xilinx. “It delivers the fastest path to realize 2-6x the compute efficiency over FPGA competition.”

Neil Tyler

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