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Virtual platforms accelerate FPGA hardware/software development

Mentor Graphics has launched Vista virtual platforms for Altera’s Arria 10 SoC FPGA range. The platforms, said to be fully functional simulation models of processor subsystems and peripherals, are offered as downloadable prebuilt binaries. The Altera SoC Virtual Platform executable combines an instruction set simulator CPU model with models of the processor peripherals into a binary executable.

Chris Balough, Altera’s senior director of marketing, said: “Our technology partnership with Mentor lessens our customer’s risks by accelerating embedded system development through identifying design issues that would be difficult or too late to find in the physical hardware.”

Vista platforms allow embedded engineers to begin development and debug before silicon becomes available. The binaries can be installed on a host PC and run together with a prebuilt Linux image. In addition, a model of custom functions in the FPGA fabric can be linked to the virtual platform for system-level simulation. The platforms support bare metal/RTOS and Linux environments.

Guy Moshe, general manager of Mentor’s Design Creation Business Unit, noted: “Our virtual platform solution allows developers of Altera SoC FPGAs to realise increased performance, accuracy and cost savings, whilst accelerating their software development.”

Using Vista Architect, hardware and system engineers can access the Altera hardware platform source and customise and manipulate the SoC and FPGA models. According to the partners, this enables users to test, analyse and explore hardware configurations, peripheral alternatives, memory hierarchies and resource utilisation.

Graham Pitcher

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