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Transmitter architecture suits RF CMOS SoCs

While analogue transmitters are less suitable for integration in advanced CMOS nodes, digital transmitters typically fall short when it comes to high-end performance parameters such as out-of-band noise and spurious emission.

Belgian nanoelectronics research center imec and Vrije Universiteit Brussel claim to have overcome this with a transmitter architecture that combines the best of both worlds. The partners have demonstrated a 0.22mm2 CMOS resistive charge based direct launch digital transmitter with an out of band noise of -159dBc/Hz and say the development paves the way to small form factor SAW less transmitter implementations that all cellular standards.

Incremental charge based D/A (QDAC) conversion is said to allow full direct digital control of the transmitted signal, while enabling filtering of the intrinsic noise that reduces out-of-band noise and alias components.

The prototype features resistor based QDACs that deliver RF power directly to the 50? output load, omitting the need for a power amplifier driver. A peak output power of 3.5dBm and a phase noise of -159Bc/Hz at 45MHz offset from both 900MHz and 2.4GHz modulated carriers is claimed, with an error vector magnitude of -36dB for a 64 QAM modulated signal.

Graham Pitcher

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