23 July 2010

Tier Logic hits the buffers

  • Tier Logic hits the buffers

FPGA start up Tier Logic has folded after failing to raise Series B funding. Paul Hollingworth, pictured, who was vp of sales and marketing, said: "We had working silicon, production tools which customers were using and even had customer orders. Despite the fact that we had only spent less than $20million, we couldn't find an investor to come into a Series B funding round."


Tier Logic was founded by fpga process technology pioneer Raminda Madurawe and was led by Doug Laird. As the company came out of 'stealth mode' earlier this year, Laird said: "Not only have we developed silicon and tools but, unlike most semiconductor startups, we also developed a process technology first. And we've already been granted more than 50 patents on fundamental 3d concepts and architectures. All this has been achieved for less than $20m."
Its premise was that fpgas could be built in three dimensions, reducing cost and making it easier to move to an asic.
In the approach, user circuits and configuration circuits are separated into stacked layers. By taking configuration logic away from the base layers, Tier Logic believed it could enable smaller, faster and more reliable fpgas which consumed less power.

Author
Graham Pitcher

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