10 March 2010
Tier Logic comes out of stealth, targets design and production needs
Prompted to emergy from 'stealth mode' by recent announcements by Tabula, Tier Logic has unveiled its 3d based technology for fpgas and asics.
Tier Logic separates user circuits and configuration circuits into stacked layers. By removing the configuration overhead from the silicon base layers, Tier Logic says it can produce smaller, denser, faster, lower power and more reliable fpgas.
VP of marketing Paul Hollingworth noted: "More than half of the transistors in a modern fpga are used for configuration logic. If those are placed on a second layer using thin film transistor technology, the die size can be reduced and there is also the opportunity to replace the tft layer with metal to create an asic."
Because the timing is performed in the base layer, this remains identical between the fpga and asic, allowing 'zero risk, zero effort' conversions. Hollingworth also claimed that asics would be roughly half the cost of the fpga version.
Two benefits are claimed for the 3d approach. "Apart from smaller die size because of the shift to 3d," said Hollingworth, "you also get more efficient look up table utilisation."
He claimed the devices will suit both design and production needs. "FPGAs are ideal in the design phase, but not good in production because of cost. The situation is reversed for asics, which are difficult to get to production. Until now, nobody had a solution which works for both phases."
Hollingworth claimed 28 designs had been synthesised to Xilinx fpgas, then synthesised to Tier Logic's technology. "Our results show TierFPGAs bring between 1.8 and 3.5 times the architectural efficiency of traditional devices."
While Tier Logic isn't making any specific product announcements, the roll out of TierFPGAs will start in the near future. However, TierASICS are available now and the company is offering customers with existing fpgas who wish to take advantage of immediate conversion to TierASICs a free NRE if they place a production order for $50k or more. In addition, for an order of $100k or more, Tier Logic will create a custom pin compatible package to avoid customers having to alter existing pcbs.
Author
Graham Pitcher
Supporting Information
Websites
http://www.tierlogic.com
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