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Tabula fleshes out fpga family details

Tabula has launched the ABAX family of 3-D programmable logic devices, based on its Spacetime architecture. According to the company, ABAX devices enable high performance, compute intensive applications to run on programmable platforms at volume price points.

Deployed on TSMC's 40 nm process, ABAX devices integrate fully configurable, high performance I/Os, including 920 general purpose parallel I/Os and 48 6.5Gbit/s serial transceivers. The ABAX family's design flow is said to closely resemble those of fpgas and asics, using synthesis, placement and routing to compile designs from RTL into silicon. In addition, ABAX devices support a broad portfolio of soft IP cores, including DDR2 and DDR3 memory controllers, PCI Express, Gigabit and 10Gbit Ethernet, soft cpus, sRIO, CPRI and OBSAI.
"We are proud to announce our 40nm ABAX family of Spacetime 3PLD devices," said Dennis Segers, Tabula's ceo. "We believe the combination of our Spacetime architecture, our commitment to advanced process technology nodes and our focus on standard design flows, set Tabula and ABAX apart."
The initial ABAX products to be released by Tabula will be the A1EC02, A1EC03, A1EC04 and the A1EC06. Samples of the A1EC04 will be available in Q3 2010, and will go into mass production in Q4 2010. This device features 390k look up tables, 5.5Mbyte of ram, 920 I/O, 48 serdes and 44 plls.

Author
Graham Pitcher

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