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Synopsys looks to speed IP integration in SoCs

Synopsys looks to speed IP integration in SoCs

Synopsys has launched the IP Accelerated initiative and says it will reduce the time it takes to integrate IP into SoCs.

Dr Johannes Stahl, director of product marketing for virtual prototyping, said: "We are changing the responsibility of what we do for customers. So far we have sold IP – we have a large IP portfolio – but we are trying to deliver more."

In the initial phase, 'delivering more' includes adding IP prototyping kits, IP virtual development kits and customised IP subsystems to the existing IP portfolio, with the object of accelerating prototyping, software development and integration of IP into SoCs.

The IP prototyping kit eliminates CTL and PHY integration and CTL prototyping that normally can take six to eight weeks. Dr Stahl commented: "Many customers have been using our prototyping kits and know how long it has taken in the past. But even taking account of the unpacking time of the kit, it will probably take less than an hour."

IP virtual development kits consist of a multicore ARM Cortex-A57 Versatile Express based reference design and a configurable model of the DesignWare IP. The IP Virtual Development Kits run Linaro Linux and include reference drivers for the DesignWare IP. "It means the software developers can work ahead of the hardware guys, they don't need to wait," said Dr Stahl.

Author
Tim Fryer

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