08 June 2012

Researchers slash energy needs for next gen memory

US researchers have unveiled a new data encoding scheme that is said to slash more than 30% of the energy needed to write data onto memory cards that use phase change memory (PCM).

In PCM technology, heat sensitive materials are used to store data by changing the resistance and altering the arrangement of atoms from a conducting to a nonconducting structure. PCM is said to be much quicker than flash and the process is reversible but asymmetric; creating one state requires a short burst of intense heat, and reversing that state requires more time and less heat.

The team at Rice University and UCLA claim to have exploited these asymmetric properties to minimise the number of bit transitions and therefore yield greater efficiency. They achieved this by creating an encoder that can scan the 'words' — short sections of bits on the card — and overwrite only the parts that need to be overwritten.

"One part of the method is based on dynamic programming, which starts from small codes that we show to be optimal, and then builds upon these small codes to rapidly search for improved, longer codes that minimise the bit transitions," said Farinaz Koushanfar, director of Rice's ACES Laboratory and assistant professor of electrical and computer engineering.

The second part of the method is based on integer linear programming (ILP). As ILP takes longer to find optimal solutions depending on how complex they are, the team used dynamic programming to create a cheat sheet of small codes that could be quickly combined for more complex solutions.

Miodrag Potkonjak, professor of computer science at UCLA, commented: "The overhead for ILP is practical because the codes are found only once, during the design phase. The codes are stored for later use during PCM operation."

The team found that this encoding scheme cut more than 40% of 'memory wear'.

In addition to PCM, the researchers claim the encoding method is also applicable for other types of bit accessible memories, including STT-RAM, or spin transfer torque random access memory.

Author
Simon Fogg

Supporting Information

Websites
http://www.rice.edu/
http://www.ucla.edu/

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