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ARM launches quad core hard macro Cortex-A15 MPCore processor

ARM has announced a high performance, power optimised quad core hard macro implementation of its Cortex-A15 MPCore processor targeted at TSMC's 28HPM process. The hard macro, which is designed to run at 2GHz, is said to deliver a performance in excess of 20,000DMIPS, while maintaining the power efficiency of the Cortex-A9 hard macro.

Describing the hard macro as an 'important addition' to ARM's portfolio, Jim Nicholas, vice president of marketing for ARM's processor division, said: "For SoC designers looking to make a trade off between the flexibility offered by the traditional rtl based SoC development strategy and a rapid time to market, with ensured, benchmarked power, performance and area, an ARM hard macro implementation is a cost effective solution."

The company says the hard macro has been developed as a result of the synergy between its Cortex processor IP, Artisan physical IP, CoreLink systems IP and its integration capabilities.

The low leakage implementation, featuring integrated NEON SIMD technology and floating point, offers a balance between performance and power and is said to be suitable for a range of computing applications ranging from notebooks to 'extreme performance orientated' network and enterprise devices.

The hard macro was developed using ARM Artisan 12-track libraries and the recently announced Processor Optimization Pack (POP) for the Cortex-A15.

Graham Pitcher

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