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ARM looks to help designers implement Cortex-A based products at 28 and 40nm

Processor Optimisation Packs to ease Cortex-A based design headaches

ARM has expanded its range of Processor Optimization Packs (POPs) for TSMC's 28 and 40nm process technologies. According to the company, 'at least nine' POP configurations – targeting Cortex-A5, A7, A9 and A15 processor cores – will be released.
A POP comprises three elements necessary to achieve an optimized ARM core implementation. First, it contains ARM Artisan Physical IP logic libraries and memory instances tuned specifically for a given ARM core and process technology. Second, it includes a benchmarking report to document the exact conditions and results ARM achieved for the core implementation. Finally, it includes a Implementation Guide that details the methodology used to achieve the result, to enable the end customer to achieve the same implementation quickly and at low risk.

John Heinlein, vice president of marketing for ARM's physical IP division, said: "The benefits of the POP are clear: it provides better power/performance and a reduction in time to market and risk."
Heinlein said the POPs – the first of which was launched in 2010 – were are response to increased design complexity. "Design is getting more complicated, with factors such as process technology, leakage and cost. Customers are faced with choices; trading power against performance and deciding where to use high performance transistors. We're helping them to get better results," he claimed.
In particular, the POPs will help those looking to design big.LITTLE solutions, in which Cortex-A7 and A15 cores are used in tandem. Meanwhile, ARM's lead licensee for the Cortex-A15 POP expects to tape out its design in the coming months, targeted at TSMC's 28HPM process.

Author
Graham Pitcher

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http://www.arm.com

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ARM Ltd

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