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Next gen HMC spec launched

A faster and more power efficient specification has been proposed by the Hybrid Memory Cube Consortium (HMCC) to boost the performance of its next generation Hybrid Memory Cube (HMC) technology.

The HMC Gen2 specification doubles the throughput of the original specification, which could deliver 15 times the bandwidth of a standard DDR3 module while consuming 70% less energy.

As well as supporting increased data rate speeds up to 30Gb/s over distances up to 20cm, it also migrates the associated channel model from SR to VSR to align with existing industry classification.

"The HMC Gen2 specification doubles the interface data rate, which enables system designers to more easily realise performance gains with next generation 20nm and 14nm FPGAs and SoCs," said Patrick Dorsey, senior director of product marketing at Altera.

The Gen2 specification will be finalised by the middle of this year, and will replace the previous specification released by HMCC in 2013.

HMCC was established in 2011 by Micron Technology, Samsung Electronics and SK hynix in a bid to find a faster, cheaper and more efficient alternative to DRAM. Other members include Altera, ARM, Xilinx and IBM.

Author
Laura Hopperton

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