31 August 2010
Glasgow spin out tackles variability in next generation chip design
A spin out company from Glasgow University hopes that it can help in the design of next generation chips. According to Gold Standard Simulations (GSS), it will help designers to model how circuits built from variable and unreliable nanoscale transistors are likely to perform.
The company was created by Professor Asen Asenov, pictured, a leading device modelling expert. He said: "GSS is offering a world leading simulation service to chip developers and manufacturers. The University of Glasgow is at the forefront of this technology."
According to Prof Asenov, simulation is necessary as transistors become smaller and variations in their structure result in variable and unreliable performance – affecting the whole circuit performance and yield. Being able to take this 'statistical variability' into account when designing circuits will be a huge benefit to industry and help ensure the continued scaling of microchips, he claimed.
The company will also offer courses in statistical variability which will give participants the knowledge and tools to understand, control and mitigate the issues related to variability and reliability and to design variability resistant and reliable devices and circuits.
Prof Asenov is leading the University of Glasgow's involvement in the MODERN (MOdeling and DEsign of Reliable, process variation-aware Nanoelectronic devices, circuits and systems) project – a €26million European project looking at how to design the next generation computer chips.
University of Glasgow
This material is protected by Findlay Media copyright
One-off usage is permitted but bulk copying is not.
For multiple copies contact the