comment on this article

FPGA uses time as third dimension to boost performance

programmablel ogic device

A programmable logic architecture that uses time as a third dimension to offer 'significantly higher logic, memory and signal processing capabilities than fgpas' has been unveiled by Tabula.

Spacetime hardware dynamically reconfigures logic, memory, and interconnect at multiGHz rates, with the reconfiguration managed by the Spacetime compiler. Tabula says its devices will have significant density advantages and dramatically shorter interconnects when compared to fpgas that use 2d architectures.
"The key to Spacetime and its many advantages is resolving the interconnect problem intrinsic to FPGAs," said Steve Teig, pictured left, Tabula's president and cto. "Almost 90% of the core area of fpgas is devoted to the implementation and control of interconnect. Besides driving up die size and product cost, the long connections also limit performance and make timing closure more difficult. If you're going to achieve a breakthrough in programmable capability and affordability, you have to make the interconnect more efficient, and that's what Spacetime does."
"The programmable logic market is one of the most profitable segments of the semiconductor industry," said Dennis Segers, pictured right, Tabula's ceo. "Since 2000, however, there has been only incremental improvement in fpga architectures and circuits from the market leaders, leaving programmable logic customers underserved and limiting growth for the industry segment. With the Spacetime architecture, Tabula will bring unprecedented value into the programmable logic space, restoring innovation into this formerly vibrant market and accelerating its growth."
Tabula claims that, when compared to a 40nm fpga, a 40nm Spacetime device will deliver 2.5x more logic density, double the memory density, 2.9x more memory ports and four times the dsp performance.

Author
Graham Pitcher

Comment on this article


This material is protected by Findlay Media copyright See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team.

Enjoy this story? People who read this article also read...

What you think about this article:


Add your comments

Name
 
Email
 
Comments
 

Your comments/feedback may be edited prior to publishing. Not all entries will be published.
Please view our Terms and Conditions before leaving a comment.

Related Articles

A companion for ASICs

Lattice Semiconductor has unveiled the ECP5 family of FPGAs, designed for use ...

LED Reference Design

The XMOS LED Reference Design is an Ethernet-based system featuring daisychains ...

Powering Xilinx fpgas

This video provides a detailed overview on how to use TI's WEBENCH FPGA Power ...

FPGAs come of age

Programmable logic devices have a range of aliases, but whatever you call them, ...

Claire Jeffreys, NEW

Claire Jeffreys, events director, National Electronics Week, talks with Chris ...