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Expansion over acquisition


Programmable logic company develops 'third wave' architecture. Philip Ling reports.

Lattice Semiconductor has introduced fpga and pld devices with 'expandable' architectures. Using its flagship eeprom technology, it has created non volatile fpga devices aimed squarely at existing and potential users of Xilinx' Virtex II parts.

After a series of high profile acquisitions, Lattice has now developed its own fpga architecture, a feat achieved by a select few companies since fpgas were unveiled in the early 1980s. Lattice has used the same methodology to create another family of cplds to add to its existing range (which already includes its own and those of Vantis and Agere).

As the configuration is stored on chip, there is no need for the external device used with sram based fpgas. It needs around 1million bits to configure the largest device, but Lattice maintains that, at 0.18um, it is not a big penalty in silicon space.

It calls the technology ispXP, for 'in system programmable, expanded programmability' – all of which means it uses eeprom with sram to offer 'instant on' coupled with reprogrammability. The company uses ispXP in both the fpga and cpld devices announced last month.

Beyond the eeprom/sram mix, the parts are fairly traditional; the fpga uses look up tables and the pld uses product terms, albeit with multifunction blocks instead of macrocells. Further details of ispXP will appear in the 22 October issue of New Electronics.

Author
Graham Pitcher

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