comment on this article

Enterprise-Class SSDs come with 64-Layer 3D Flash Memory

Toshiba Electronics Europe has announced the development of two new flagship enterprise solid state drive (SSD) solutions, the TMC PM5 12Gbit/s SAS series and the CM5 NVM Express (NVMe) series.

Both product lines are built with TMC’s latest 64 layer, 3-bit-per-cell enterprise-class TLC (triple-level cell) BiCS FLASH, making it possible for storage environments to now expand the use of flash with cost-optimised 3D flash memory. Development is expected to be completed in the fourth quarter.

Offering up to 30.72TB, in a 2.5-inch form factor, the TMC PM5 series introduces a full range of endurance and capacity SAS SSDs that will enable data centers to address big data demands while being able to streamline storage deployments. Providing the industry’s first MultiLink SAS architecture, the PM5 series can deliver, according to Toshiba, the fastest performance seen to date from a SAS-based SSD with up to 3,350 MB/s of sequential read and 2,720 MB/s of sequential write in MultiLink mode and up to 400,000 random read IOPS in narrow or MultiLink mode.

The PM5 series’ 4-port MultiLink design is an additional technology to achieve high performance, close to PCI EXPRESS (PCIe ) SSDs, enabling legacy infrastructures to increase productivity without having to be re-architected from the ground up. In addition, PM5 SSDs are able to support multi-stream write technology, a feature that intelligently manages and groups data types to minimise write amplification and minimise garbage collection, which means reduced latency, improved endurance, increased performance and Quality of Service (QoS).

As TMC’s next generation NVMe SSD, the dual-port PCIe Gen3 x4 CM5 is a full-featured enterprise SSD. Like the PM5, it also supports multi-stream write technology. It is NVMe over Fabric-ready with scatter-gather list (SGL) and controller memory buffer (CMB) features. The CMB feature uses a part of DRAM on the SSD as host-system memory, reducing DRAM used load of host-side and it enables high speed as a system.

Using TMC’s BiCS FLASH 64-layer technology, the CM5 series can offer up to 800,000 random read and 240,000 random write IOPS for the 5 DWPD (drive writes per day) model and up to 220,000 random write IOPS for the 3 DWPD model, both with a maximum power draw of 18W.

In addition, the CM5 is being used as a platform to demonstrate and to enable the ecosystem around the Persistent Memory Region (PMR) capability. PMR enables customers to augment system memory with DRAM on the SSD without the use of expensive non-volatile DIMMs (NV-DIMMs). This makes it possible for a single SSD solution to provide both high performance storage and persistent memory to meet system performance requirements, while significantly reducing costs by moving metadata operations, such as logging, journaling and application staging to the SSD.

PM5 12Gbit/s SAS SSDs will be available in capacities ranging from 400GB to 30.72TB with sanitise instant erase (SIE) and Trusted Computing Group (TCG). CM5 NVMe SSDs will offer capacities ranging from 800GB to 15.36TB with SIE and TCG. Both TLC-based product lines offer industry standard endurance ratings with 1, 3 and 5 DWPD options, and the PM5 has a 10 DWPD option available.

Author
Neil Tyler

Comment on this article


This material is protected by MA Business copyright See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team.

What you think about this article:


Add your comments

Name
 
Email
 
Comments
 

Your comments/feedback may be edited prior to publishing. Not all entries will be published.
Please view our Terms and Conditions before leaving a comment.

Related Articles

Managing standards

With over 860 members the European Telecommunications Standards Institute ...

What is EMC testing?

Testing of products under EU guidelines to ensure they don't either pollute the ...

4G/LTE clock first

Silicon Labs has introduced a family of high-performance, multi-channel jitter ...

Circuit protection

Circuit protection is designed as an intentional weak link which can combat ...

Who will blink first?

Apple has gone head-to-head with the US Federal Bureau of Investigation after ...

Meeting IoT challenges

It’s fair to say that over the past 12 months the IoT and big data technologies ...