27 May 2010

Cortex-A9 to power ‘new microprocessor architecture’

  • 32bit microprocessor

STMicroelectronics has released details of a new architecture which it says will be the backbone for new members of its Structured Processor Enhanced Architecture, or SPEAr, family of embedded microprocessors.

"This new architecture builds upon the unrivalled low power and multiprocessing capabilities of the ARM Cortex-A9 processor core," said Loris Valenti, general manager of ST's Computer Systems SoC Division. "Upcoming SPEAr embedded microprocessors will deliver an unprecedented combination of processing performance, memory throughput, flexibility and low power for next generation connectivity appliances."
The new architecture is said to offer high performance in terms of DMIPS/MHz and power consumption/DMIPS, as well as offering price performance and customisation advantages. ST believes the device's integrated DDR3 memory controller and connectivity peripherals will make SPEAr1300 a suitable choice for high performance applications, including factory automation.
The SPEAr1300 product line, which features a dual ARM Cortex-A9 processor, will be manufactured on ST's low power 55nm HCMOS (high-speed CMOS) process. The dual processors support fully symmetrical operation at speeds of up to 600MHz/core, bringing a computing performance equivalent to 3000DMIPS. SPEAr1300 also features ST's Network on Chip technology for internal peripheral interconnect.

Author
Graham Pitcher

Supporting Information

Websites
http://www.st.com

Companies
ST Microelectronics Ltd

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