09 February 2010

Cadence releases latest version of EDI system

Cadence has released version 9.1 of its Encounter Digital Implementation (EDI) System. Expanded features in the software are said to answer calls for better productivity when developing complex SoCs on leading edge process nodes.

"Semiconductor leaders and ecosystem partners provide us with early insight into emerging challenges and this collaboration is exactly what allows us to get ahead of the curve," claimed David Desharnais, Cadence's group director of design, implementation and verification product management.

According to the company, EDI System 9.1 removes the challenges to design productivity through innovative design exploration capabilities. By combining automatic floorplan synthesis, data abstraction modelling and concurrent macro and standard cell placement, users can quickly find and implement the optimal physical architecture of a chip.

Author
Graham Pitcher

Supporting Information

Websites
http://www.cadence.com

Companies
Cadence

This material is protected by Findlay Media copyright
See Terms and Conditions.
One-off usage is permitted but bulk copying is not.
For multiple copies contact the sales team.

Do you have any comments about this article?


Add your comments

Name
 
Email
 
Comments
 

Your comments/feedback may be edited prior to publishing. Not all entries will be published.
Please view our Terms and Conditions before leaving a comment.

Related Articles

AMD slates ARM chip for 2014

AMD has revealed plans to sample its first ARM based processors for servers ...

SoC design upgrade

Synopsys has extended its DesignWare portfolio with the addition of the ...

‘Mil grade’ rtos upgrade

Embedded software specialist LynuxWorks has launched version 7.0 of the LynxOS ...

Providing a platform

There has been, in the opinion of AMD, a revolution in computing, with graphics ...

Embedded software roundtable

Developing software for embedded systems isn't getting any easier. As systems ...

Cutting the power bill

SoCs are getting smaller and faster, but smaller node geometries leak more ...

KeyStone software

This whitepaper explores how Texas Instruments' KeyStone multicore SoCs offload ...

SoC challenges

This whitepaper explores an advanced motor drive or inverter application to ...

Using Linux in medical devices

This whitepaper explores the issues that software developers and medical device ...

OpenCL development kit

Altera has announced a new software development kit for OpenCL, a move which ...

FSI image sensors

Toshiba Electronics Europe has added two new devices to its cmos image sensor ...

Flexible PLC modem SoC

ON Semiconductor has introduced a new power line carrier (PLC) modem system on ...

Altium design secret 17

In this design secret, senior applications engineer Colby Siemer shows a novel ...

InstaSPIN-FOC solution

Learn about TI's breakthrough motor control technology. InstaSPIN-FOC motor ...

Altium design secret 16

Many Altium customers are happy to have the ability to add 3d models to ...

By any other name...

In the mid 1990s, when programmable logic devices – the forebears of today's ...

Cadence targets IP leadership

In a report from December 2012's IPSoC conference in Grenoble, Louise Joselyn ...

Embedded engineering needs

Software is a fundamental part of developing today's electronic devices. It's ...

Dr Chris Rowen, Tensilica

Dr Chris Rowen tells Caroline Hayes why he is excited about the the Cadence ...

Andreas Pabinger, Wind River

Three years ago, Wind River Systems – developer of the VxWorks real time ...

Cyrille Comar, AdaCore Europe

Cyrille Comar, co founder and managing director of AdaCore Europe, speaks to ...