13 March 2012
ARM, Freescale launch lowest power 32bit mcu yet
ARM has gone back to the drawing board and created a 32bit microcontroller core with the lowest power consumption yet.
Richard York, director of product marketing for the processor division, said: "When we looked at the Cortex-M0 core, we said it was good, but we could do better."
According to York, the M0+ core – previously known within ARM as Flycatcher – is not fundamentally different to the M0. "But we've looked at things which the M0 didn't address," he continued. "We have developed a core which is 50% more energy efficient than the M0, but which has an almost identical gate count."
It has a dual stage pipeline; the first time an ARM core has had less than three. York explained: "It saves silicon and power. And, by adding some logic to spot when you don't need to access flash, there's a 10% increase in performance at the same clock speed."
The M0+ core is rated at 1.77CoreMark/MHz, with an energy efficiency of 42.14CoreMark/nA – both values significantly better than the nearest 8 and 16bit competitors.
Freescale will be the lead customer for the M0+, which features in the new Kinetis-L range. Geoff Lees, vp of Freescale's industrial and multimarket mcu business, said the M0+ core is 'strategically important'. "We're looking at giving our 8 and 16bit customers a worthwhile step into the 32bit market. And cost is a 'must have' to convince them to start evaluation."
The launch of Kinetis L spells the end of 8 and 16bit mcu development at Freescale, although existing parts will be available for many years. "Unless a customer can make a huge business case to stay with 8bit, we'll be recommending M0+ based mcus in the future," Lees concluded.
Author
Graham Pitcher
Supporting Information
Websites
http://www.arm.com/
http://www.freescale.com/
Companies
ARM Ltd
Freescale Semiconductor
This material is protected by Findlay Media copyright
See Terms
and Conditions.
One-off usage is permitted but bulk copying is not.
For multiple copies contact the
sales team.