comment on this article

Altera set to bring ‘big performance boosts’ to fpga users

Altera set to bring ‘big performance boosts’ to fpga users

Altera has announced two new product families, which the company says are the 10th generation of its fpga technology. Stratix 10 will be manufactured on Intel's 14nm Tri-Gate process, while Arria 10 products will be made by TSMC on a 20nm process.

Beyond this, Altera isn't saying very much, except to say that samples of Arria 10 devices will be available 'early in 2014'. Altera is following its normal introduction process for the Stratix 10 range – which could feature up to 4million logic elements (LEs) – and says it expects test chips 'this year'. Both families will be available in fpga and SoC variants, with the SoCs featuring hard processor subsystems.

Stratix 10 devices will be the most powerful Altera has introduced. According to Danny Biran, pictured, senior vice president of corporate strategy, the parts will feature a new architecture, but that's as far as he went. However, he claimed users could expect a significant performance boost. "If you look at the last few years, the semiconductor industry has been facing a challenge. As we move from one process node to the next, we get an improvement in density, but not much improvement in performance and power. But, with our next generation, we can break away from this, maybe doubling current performance."

He said developers will be able to trade off power and performance during the design process. "At one end, designers will get performance at any cost – maybe double – but will increase power consumption by 30%. Still, that's better than anything we've seen for years. In the middle, there's a balance point, bringing 40 to 60% more performance for the same power consumption as today while at the other end, current levels of performance can be had for 30% of today's power consumption." Biran would not give details of the Stratix 10 SoC's processor subsystem.

Meanwhile, Arria 10 represents the new mid range offering, even though it will outperform today's Stratix V parts. Biran said users could expect a 15% performance increase over Stratix V, while consuming 40% less power than Arria V devices. "Whatever you can do today with high end parts, you'll be able to do with mid range devices at lower power consumption."

Arria 10 SoCs will have a dual Cortex-A9 hard processor subsystem running at 1.5GHz, along with 16 transceivers supporting 28Gbit/s chip to chip data rates. "These parts will have more than 1m LEs," Biran added, "and we already have more than 1000 customers working on Arria 10 based designs." Other features include interfaces to DDR4 memory and to the Hybrid Memory Cube, and three Ethernet MACs supporting 1Gbit links.

Biran said customers had, in general, coped with the SoC concept. "We were worried about customer adoption," he admitted, "but have been positively surprised about what we're seeing."

Nevertheless, more complex devices require broader support. "A 4m LE Stratix 10 part will mean compile time becomes critical. Quartus II will bring an x8 boost over time, with the next release bringing twice the existing performance." He said dsp engineers also needed to be accommodated. "They think differently to fpga designs, so we have to think about separate audiences. DSP Builder will be just as important."

Biran also reinforced the importance of Altera's recent acquisition of power management specialist Enpirion. "This will be strategic for Stratix 10, where we will be able to offer a better overall solution, including adaptive voltage scaling. If the fpga can tell the power controller that it runs fast, the controller can lower the power consumption for the same performance."

Author
Graham Pitcher

Comment on this article


This material is protected by Findlay Media copyright See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team.

Enjoy this story? People who read this article also read...

What you think about this article:


Add your comments

Name
 
Email
 
Comments
 

Your comments/feedback may be edited prior to publishing. Not all entries will be published.
Please view our Terms and Conditions before leaving a comment.

Related Articles

A companion for ASICs

Lattice Semiconductor has unveiled the ECP5 family of FPGAs, designed for use ...

LED Reference Design

The XMOS LED Reference Design is an Ethernet-based system featuring daisychains ...

Powering Xilinx fpgas

This video provides a detailed overview on how to use TI's WEBENCH FPGA Power ...

FPGAs come of age

Programmable logic devices have a range of aliases, but whatever you call them, ...

Claire Jeffreys, NEW

Claire Jeffreys, events director, National Electronics Week, talks with Chris ...