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DVCon Europe 2016 announces its technical programme

The Design and Verification Conference (DVCon) and Exhibition taking place in Munich will focus on the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits.

DVCon Europe will bring chip architects, design and verification engineers, as well as IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.

The technical programme for DVCon Europe 2016 is now available, and includes 15 paper sessions, 16 tutorials, a vendor exhibition, 10 "Lightening Talks", keynote speeches and a gala dinner. The programme covers the following themes:

  • UVM techniques and advances
  • SystemC methodology evolution
  • Analog mixed signal design
  • Software and firmware design considerations
  • Power optimisation tools and techniques
  • Advanced verification, including Portable Stimulus
  • Next generation simulation and formal verification
  • Functional safety and high reliability development
  • Advances in design languages and other standards
  • Contemporary design challenges and solutions

The new "Lightening Talks" introduce several topics in just over an hour and are structured as informational discussions.

Early bird registration discount is available on September 29th 2016. Register at: www.dvcon-europe.org/registration.

Contributor
Peggy Lee

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