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NXP boosts power efficiency with FD-SOI

FD-SOI – or fully depleted silicon on insulator – was developed by STMicroelectronics and has remained, until recently, as something of an outsider. But deals with Globalfoundries have seen its fortunes improve significantly. The company is expanding 22nm FD-SOI capacity at its Dresden fab by 40% and building a 300mm fab for 22FDX based products in China.

Now, NXP says it’s the first company to launch a general purpose processor manufactured using 28nm FD-SOI technology. FD-SOI, says the company, enables a large dynamic gate and body biasing voltage range, allowing performance and power consumption to be traded off.

Forward back bias lowers Vt by applying a positive body to source voltage to the NMOS element. This results in faster, but leakier, transistors. However, reverse back biasing raises Vt through applying a negative body-to-source voltage to the NMOS element, bringing slower, but less leaky, transistors.

The i.MX 7ULP family of application processors unveiled at Embedded World are said to consume only 15µW in deep sleep mode – a 17x improvement over previous devices. Even in active mode, they consume less than 10mW.

In a world where power consumption is becoming ever more important, a number of MCU manufacturers have their eyes on 28nm processes. While most are targeting ‘traditional’ processes, it looks like NXP might have got the jump on them with FD-SOI.

Author
Graham Pitcher

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