14 February 2012
Making 28nm chips isn't easy; who would have guessed?
The debate about yields from TSMC's 28nm process continues to rumble on. Depending on who you talk to, opinions range from 'it's a disaster' to 'no real problems'.
At one end of the scale, observers believe the process has failed to yield many usable chips after 10 designs from seven customers have run through the line. TSMC's response is that yields and defect densities are 'better than they were at the same time during the 40nm roll out' – a line it has maintained for a year or more. But TSMC is tight lipped at the best of times; it won't spill the beans if things aren't going well.
TSMC's 40nm roll out certainly wasn't without problems; yields were seemingly bad enough that Rick Tsai, ceo at the time, paid with his job.
That was then. Altera, traditionally amongst the first to run designs on each new TSMC process node, has issued an official testimonial via TSMC claiming satisfaction with 28nm. Confirming this, an Altera insider says the company 'isn't seeing any unusual issues'. If anyone was going to experience problems, it would probably be the process node pioneers.
Even if TSMC is struggling, should we be surprised? Making 28nm chips was never going to be easy, but the technical hurdles will be nothing to those which lie ahead as the industry moves to making 14nm devices on 450mm diameter wafers.
An indication of the scale of the looming problems can be seen by TSMC's hiring policy. The foundry giant now has close to 3000 people working in process and platform R&D. Tasks on their agenda, apart from 450mm wafers, include getting extreme ultraviolet lithography ready for production. But the $6billion R&D budget should help there.
Meanwhile, standing on the sidelines – and probably watching with a knowing smile on its corporate face – is Intel, where volume production of Ivy Bridge processors on a 22nm process started towards the end of 2011.
Author
Graham Pitcher
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