13 January 2011

JTAG testing for everyman (and everywoman)

Believe it or not JTAG testing (the original purpose for the now venerable access port on many of today's micros, DSPs, FPGAs and CPLDs) has finally come of age (21 this year). Yet there still exists a divide in the knowledge of those working in our industry. I have lost count of the amount of times, when manning exhibition stands, that engineers (from all disciplines) have asked: "JTAG ! What's all that about then?"

Following a stifled sigh I then explain how JTAG (acronym for Joint Test Action Group by the way) was devised as an aid to design, test and production engineers for fault-finding problems on (highly integrated) PCBs and how by adding test logic into the devices themselves (a role now admirably fulfilled by the IC vendors) you can equip every PCB with a self-test function. The more devices with JTAG test logic that are fitted the better the resultant self-test.

Spin-off benefits over the years have allowed JTAG aficionados to configure their programmable logic and even program flash devices and serial PROMs. However, over all these years JTAG (for test at least) has still largely been the domain of the PCB production - due mainly to price barriers (fully fledge systems typically cost 10,000 GBP or more).

What is still not widely known is that you can start using JTAG for basic pin-toggling and continuity testing with little or no investment. The JTAG Live brand from the company I work for includes a free downloadable continuity tester called Buzz, another internet vendor can supply product that use JTAG sample mode to provide chip by chip pin activity indicators for as little as 75 GBP.

So, if this fresh information has awaked a dormant interest in testing and debugging your PCBs using 21st technology, please give it a go - if you need any help then I would be pleased to hear from you.

James Stanbridge

Supporting Information


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