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ASICs still have a role to play

Gartner Dataquest tells us asic design starts are likely to decline by 22% this year, having seen a 9% drop in the last quarter of 2008. It's no surprise, to be honest. Even without the current financial problems, it's likely asic design starts would have declined – it's a trend of the last few years.

Why? Because anyone considering a leading edge asic will need to have a budget of $100million – and there are few companies in the best of times willing to commit those sums.
The main beneficiary is the fpga. Where the fpga once used to be the prototyping medium for an asic, the technology now has a 30:1 advantage over asics when it comes to design starts. There are a number of reasons why this is the case, including programmability.
There is, however, a perception problem. Mention the word 'asic' and most people think immediately of a device targeted at the bleeding edge of process technology. But that's not always the case. A range of companies offer asics on legacy processes – even something so apparently archaic as 0.25µm.
Designers select asics for good reasons: benefits include minimum die size, cost reduction and optimised power consumption. Those requirements don't go away. Countering these benefits are the fact that asics cost more to develop, take longer to develop, are single source products and are fixed designs. Worst of all is the dreaded 'respin'. Get the asic design wrong and it costs a lot of time and money to fix the problem. In a consumer product, this could mean missing the market window.
However, older processes are often amortised, so the production costs aren't that high and mask costs on a 0.25µm process are low enough to be viewed as 'reasonable'.
FPGAs certainly make sense in some applications, but they won't tick all of the boxes all of the time. What's important is that designers select appropriate technology, not necessarily technology which is fashionable.

Author
Graham Pitcher

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