|
|
|
|
|
|
|
|
|
|
11/06/2007
 Email to a friend
|
| |
A research team combining staff from the US National Institute of Standards and Technology (NIST), George Mason University and Kwangwoon University in Korea has fabricated a memory device that combines silicon nanowires with a more traditional type of data storage. The hybrid structure is said to be more reliable than other nanowire based memory devices and more easily integrated into commercial applications.
The approach integrates nanowires with semiconductor-oxide-nitride-oxide-semiconductor (SONOS) technology, which is similar to flash.
Applying a positive voltage across the nanowires causes electrons in the wires to tunnel down into the substrate, charging it. A negative voltage causes the electrons to tunnel back up into the wires. This process is the key to the device’s memory function: when fully charged, says the research team, each nanowire device stores a single bit of information – either a 0 or a 1.
Advantages claimed for the design include better stability at higher temperatures and easier integration into existing chip fabrication technology.
|
|
| |
Author
Graham Pitcher
|
| |
| |
|
| |
This material is protected by Findlay Media copyright 2009.
See Terms and Conditions.
One-off usage is permitted but bulk copying is not.
For multiple copies contact the sales team.
|
| |
|
|
| |
To comment on news stories or blogs you need to complete our 60 second registration process. Once completed this then allows you to download any and all white papers, register for e-zines and access our detailed supplier directory for FREE.
If you are all ready a registered user then enter your e-mail address and login.
You will need to have logged in prior to entering your comments in the boxes provided.
|