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Silicon vias push Moore’s Law 12/04/2007
 
silicon vias, 3d chip stacking IBM is claiming a breakthrough it has made in chip stacking technology will pave the way for 3d chips that will extend Moore’s Law beyond its expected limits. The technology – called ‘through silicon vias’ – allows different chip components to be packaged much closer together for faster, smaller and lower power systems.
“This breakthrough is a result of more than a decade of pioneering research at IBM,” said Lisa Su, vice president, Semiconductor Research and Development Center, IBM. “This allows us to move 3d chips from the 'lab to the fab' across a range of applications.”
IBM’s method eliminates the need for long metal wires that connect 2d chips together, relying instead on through silicon vias – vertical connections etched through the silicon wafer and filled with metal. These vias allow multiple chips to be stacked together, allowing more information to be passed between the chips.
IBM is already running chips using the through silicon via technology in its manufacturing line and will begin making sample chips using this method available to customers in the second half of this year, with production in 2008.
The first application of through silicon via technology will be in wireless communications chips that will go into power amplifiers for wireless LAN and cellular applications.
 
Author
Graham Pitcher
 
 
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 http://www.ibm.com
 
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