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Autorouter cuts design time
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25/09/2006
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Billed as a pcb design tool that doesn’t sacrifice layout quality for speed, an autorouting technology from Mentor Graphics is said to automate bus routing efficiently.
For those working with the latest high speed buses, bus routing has tended to be a time consuming and manual process, lasting days – or even weeks – for a typical consumer design.
Comments John Isaac, Mentor Graphics’ director of market development: “Designers can step back from bus structures on pcbs and very easily do tradeoffs and adjustments of major component placements in order to make those patterns work well. In 40years of developing autorouters, we have never been able to make one recognise those patterns and come up with a routing for very small form factor, very dense and precision conditions in terms of performance and manufacturability.” Mentor claims that its topology and planning tool combines the knowledge of an engineer, skill of a board designer and power of an autorouter.
Mentor has created two applications in order to mimic the cad designer’s manual edit process. First is a topology planner, used by the engineer to plan the bus systems and sub-system interconnects on the pcb. This is said to complement component placement by allowing the engineer to plan logic pathways that are optimised for performance and layout. Second is the topology router, which routes the bus interconnects automatically, following pathways defined by the engineer. And with design reuse becoming such a preoccupation for many design teams, Mentor believes the plan and routing database can be used to drive productivity improvements in the future.
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Author
Vanessa Knivett
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