|
|
|
|
|
|
|
|
|
|
09/02/2010
 Email to a friend
|
| |
Cadence has released version 9.1 of its Encounter Digital Implementation (EDI) System. Expanded features in the software are said to answer calls for better productivity when developing complex SoCs on leading edge process nodes.
"Semiconductor leaders and ecosystem partners provide us with early insight into emerging challenges and this collaboration is exactly what allows us to get ahead of the curve," claimed David Desharnais, Cadence's group director of design, implementation and verification product management.
According to the company, EDI System 9.1 removes the challenges to design productivity through innovative design exploration capabilities. By combining automatic floorplan synthesis, data abstraction modelling and concurrent macro and standard cell placement, users can quickly find and implement the optimal physical architecture of a chip.
|
|
| |
Author
Graham Pitcher
|
| |
| |
|
| |
This material is protected by Findlay Media copyright 2010.
See Terms and Conditions.
One-off usage is permitted but bulk copying is not.
For multiple copies contact the sales team.
|
| |
|
|
| |
To comment on news stories or blogs you need to complete our 60 second registration process. Once completed this then allows you to download any and all white papers, register for e-zines and access our detailed supplier directory for FREE.
If you are all ready a registered user then enter your e-mail address and login.
You will need to have logged in prior to entering your comments in the boxes provided.
|